A 15-bit 30 MS/s 145 mW three-step ADC for imaging applications

A 15-bit 30 MS/s three-step ADC for imaging applications is presented with a peak-to-peak signal to rms noise ratio of 84 dB. The offsets of the residue amplifiers are independently background calibrated. The ADC is realized in single poly, 0.18 /spl mu/m CMOS, measures 1.4 mm/sup 2/ and dissipates...

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Bibliographische Detailangaben

Hauptverfasser:	van der Ploeg, H., Vertregt, M., Lammers, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Charge coupled devices Digital signal processing Dynamic range Energy consumption Image converters Matrix converters Quantization Signal processing Signal to noise ratio Switches
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