Comprehensive models for the investigation of on-chip switching noise generation and coupling

A comprehensive modeling methodology is presented for the investigation of on-chip noise generation and coupling due to power switching. The methodology utilizes a comprehensive electromagnetic model for the on-chip portion of the power grid. Thus, the tedious and error-prone extraction of a distrib...

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Hauptverfasser: Jae-Yong Ihm, In Jae Chung, Manetas, G., Cangellaris, A.C.
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description A comprehensive modeling methodology is presented for the investigation of on-chip noise generation and coupling due to power switching. The methodology utilizes a comprehensive electromagnetic model for the on-chip portion of the power grid. Thus, the tedious and error-prone extraction of a distributed RLC model for the power grid is avoided and the generated model allows for power grid induced broadband and distributed noise coupling to be taken into account in the transient simulation. The electromagnetic model for the power grid is complemented by a distributed RC model for the semiconductor substrate and RLCG models for the interconnects. Thus, a comprehensive model results for the quantification of on-chip interconnect and power grid noise effects during switching. Transient simulations using this model are carried out using a hybrid time-domain integration scheme which combines a SPICE-like engine for the analysis of all RLCG netlists and the nonlinear drivers incorporated in the model with a numerical integration algorithm for the discrete electromagnetic model for the power grid
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identifier ISSN: 2158-110X
ispartof 2005 International Symposium on Electromagnetic Compatibility, 2005. EMC 2005, 2005, Vol.2, p.666-671
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2158-1118
language eng
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Distributed power generation
Electromagnetic modeling
Electromagnetic transients
Mesh generation
Noise generators
Power generation
Power grids
Power semiconductor switches
Semiconductor device noise
Substrates
title Comprehensive models for the investigation of on-chip switching noise generation and coupling
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