ipPROCESS: using a process to teach IP-core development

The reusing of intellectual property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging system-on-chip (SoC) designs. But the design of IP-cores has its own challenges like portability, reusability, standards interfaces, well-defined and u...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Lima, M., Aziz, A., Alves, D., Lira, P., Schwambach, V., Barros, E.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Design methodology Documentation Education Field programmable gate arrays Hardware design languages Informatics Intellectual property Productivity Prototypes System-on-a-chip
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!