A 3D miniaturization method for low impedance designs
Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 /spl mu/m deep V structure produces a 33.8 /spl Omega/...
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| creator | Banerjee, S.R. Drayton, R.F. |
| description | Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 /spl mu/m deep V structure produces a 33.8 /spl Omega/ line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 /spl Omega/ microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design. |
| doi_str_mv | 10.1109/SPI.2005.1500902 |
| format | Conference Proceeding |
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S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 /spl mu/m deep V structure produces a 33.8 /spl Omega/ line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 /spl Omega/ microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.</description><identifier>ISBN: 9780780390546</identifier><identifier>ISBN: 0780390547</identifier><identifier>DOI: 10.1109/SPI.2005.1500902</identifier><language>eng</language><publisher>IEEE</publisher><subject>Capacitors ; Conductors ; Dielectric constant ; Filters ; Impedance ; Inductors ; Integrated circuit interconnections ; Microstrip components ; Packaging ; Silicon</subject><ispartof>Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005, 2005, p.71-74</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1500902$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1500902$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Banerjee, S.R.</creatorcontrib><creatorcontrib>Drayton, R.F.</creatorcontrib><title>A 3D miniaturization method for low impedance designs</title><title>Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005</title><addtitle>SPI</addtitle><description>Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 /spl mu/m deep V structure produces a 33.8 /spl Omega/ line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 /spl Omega/ microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.</description><subject>Capacitors</subject><subject>Conductors</subject><subject>Dielectric constant</subject><subject>Filters</subject><subject>Impedance</subject><subject>Inductors</subject><subject>Integrated circuit interconnections</subject><subject>Microstrip components</subject><subject>Packaging</subject><subject>Silicon</subject><isbn>9780780390546</isbn><isbn>0780390547</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj0tLw0AUhQdEqNTshW7mDyTeec8sS30VCgrqutxkbtqRJimZiOivt2IPBz7O5oPD2I2ASggIt68v60oCmEoYgADyghXBeThVBTDazliR8wecooI1xl8xs-TqjnepTzh9jukHpzT0vKNpP0TeDiM_DF88dUeK2DfEI-W06_M1u2zxkKk4c87eH-7fVk_l5vlxvVpuyiScmUohISgtUfs6AFJTx8aiU8Fh4wAFKeu0k7pVf8vW6ElioGja2mthrFBztvj3JiLaHsfU4fi9PZ9Tv1kyQ0o</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Banerjee, S.R.</creator><creator>Drayton, R.F.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2005</creationdate><title>A 3D miniaturization method for low impedance designs</title><author>Banerjee, S.R. ; Drayton, R.F.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-1209342a48b90aecbdc6a7397ac70a1e3674724f370a16ba8e2a9ed5fb8415613</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Capacitors</topic><topic>Conductors</topic><topic>Dielectric constant</topic><topic>Filters</topic><topic>Impedance</topic><topic>Inductors</topic><topic>Integrated circuit interconnections</topic><topic>Microstrip components</topic><topic>Packaging</topic><topic>Silicon</topic><toplevel>online_resources</toplevel><creatorcontrib>Banerjee, S.R.</creatorcontrib><creatorcontrib>Drayton, R.F.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Banerjee, S.R.</au><au>Drayton, R.F.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 3D miniaturization method for low impedance designs</atitle><btitle>Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005</btitle><stitle>SPI</stitle><date>2005</date><risdate>2005</risdate><spage>71</spage><epage>74</epage><pages>71-74</pages><isbn>9780780390546</isbn><isbn>0780390547</isbn><abstract>Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 /spl mu/m deep V structure produces a 33.8 /spl Omega/ line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 /spl Omega/ microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.</abstract><pub>IEEE</pub><doi>10.1109/SPI.2005.1500902</doi><tpages>4</tpages></addata></record> |
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| language | eng |
| recordid | cdi_ieee_primary_1500902 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Capacitors Conductors Dielectric constant Filters Impedance Inductors Integrated circuit interconnections Microstrip components Packaging Silicon |
| title | A 3D miniaturization method for low impedance designs |
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