The construction of a fault tolerant reversible gate for quantum computation

Fault tolerance plays a major role in quantum computer design. As the quantum environment is not stable enough when the information is read from it, better design techniques with error correcting capability are needed to overcome the information loss due to decoherence in quantum circuits. This pape...

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Hauptverfasser: Vasudevan, D.P., Lala, P.K., Parkerson, J.P.
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Lala, P.K.
Parkerson, J.P.
description Fault tolerance plays a major role in quantum computer design. As the quantum environment is not stable enough when the information is read from it, better design techniques with error correcting capability are needed to overcome the information loss due to decoherence in quantum circuits. This paper presents a fault tolerant reversible gate that can be used in quantum computing systems.
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fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1500705</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1500705</ieee_id><sourcerecordid>1500705</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-aef6af4b6de537f32efc44b8424423d6b2d94fae755bec298990b296be8e55b63</originalsourceid><addsrcrecordid>eNo9kM1Kw0AUhQd_wFr7AOJmXiDxzm9yl6VoFUK76b7MpHc0kjR1MhF8eyMWz-bA-ThncRi7F5ALAfi4WW62uQQwuTAABZgLNhOodYaqhEt2C0UJCgWiuvoHiDdsMQwfMEmhsVbMWLV7J173xyHFsU5Nf-R94I4HN7aJp76l6I6JR_qiODS-Jf7mEvHQR_45TmTspnJ3GpP77d6x6-DagRZnn7Pd89Nu9ZJV2_XralllDULKHAXrgvb2QEYVQUkKtda-1FJrqQ7WywPq4KgwxlMtsUQEL9F6KmmKrJqzh7_Zhoj2p9h0Ln7vzz-oH4umUOo</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>The construction of a fault tolerant reversible gate for quantum computation</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Vasudevan, D.P. ; Lala, P.K. ; Parkerson, J.P.</creator><creatorcontrib>Vasudevan, D.P. ; Lala, P.K. ; Parkerson, J.P.</creatorcontrib><description>Fault tolerance plays a major role in quantum computer design. As the quantum environment is not stable enough when the information is read from it, better design techniques with error correcting capability are needed to overcome the information loss due to decoherence in quantum circuits. This paper presents a fault tolerant reversible gate that can be used in quantum computing systems.</description><identifier>ISSN: 1944-9399</identifier><identifier>ISBN: 0780391993</identifier><identifier>ISBN: 9780780391994</identifier><identifier>EISSN: 1944-9380</identifier><identifier>DOI: 10.1109/NANO.2005.1500705</identifier><language>eng</language><publisher>IEEE</publisher><subject>Computer errors ; Computer science ; Design engineering ; Error correction ; Error correction codes ; Fault tolerance ; Logic circuits ; Logic gates ; Physics computing ; Quantum computing</subject><ispartof>5th IEEE Conference on Nanotechnology, 2005, 2005, p.112-115 vol. 1</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1500705$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,4035,4036,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1500705$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Vasudevan, D.P.</creatorcontrib><creatorcontrib>Lala, P.K.</creatorcontrib><creatorcontrib>Parkerson, J.P.</creatorcontrib><title>The construction of a fault tolerant reversible gate for quantum computation</title><title>5th IEEE Conference on Nanotechnology, 2005</title><addtitle>NANO</addtitle><description>Fault tolerance plays a major role in quantum computer design. As the quantum environment is not stable enough when the information is read from it, better design techniques with error correcting capability are needed to overcome the information loss due to decoherence in quantum circuits. This paper presents a fault tolerant reversible gate that can be used in quantum computing systems.</description><subject>Computer errors</subject><subject>Computer science</subject><subject>Design engineering</subject><subject>Error correction</subject><subject>Error correction codes</subject><subject>Fault tolerance</subject><subject>Logic circuits</subject><subject>Logic gates</subject><subject>Physics computing</subject><subject>Quantum computing</subject><issn>1944-9399</issn><issn>1944-9380</issn><isbn>0780391993</isbn><isbn>9780780391994</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo9kM1Kw0AUhQd_wFr7AOJmXiDxzm9yl6VoFUK76b7MpHc0kjR1MhF8eyMWz-bA-ThncRi7F5ALAfi4WW62uQQwuTAABZgLNhOodYaqhEt2C0UJCgWiuvoHiDdsMQwfMEmhsVbMWLV7J173xyHFsU5Nf-R94I4HN7aJp76l6I6JR_qiODS-Jf7mEvHQR_45TmTspnJ3GpP77d6x6-DagRZnn7Pd89Nu9ZJV2_XralllDULKHAXrgvb2QEYVQUkKtda-1FJrqQ7WywPq4KgwxlMtsUQEL9F6KmmKrJqzh7_Zhoj2p9h0Ln7vzz-oH4umUOo</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Vasudevan, D.P.</creator><creator>Lala, P.K.</creator><creator>Parkerson, J.P.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2005</creationdate><title>The construction of a fault tolerant reversible gate for quantum computation</title><author>Vasudevan, D.P. ; Lala, P.K. ; Parkerson, J.P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-aef6af4b6de537f32efc44b8424423d6b2d94fae755bec298990b296be8e55b63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Computer errors</topic><topic>Computer science</topic><topic>Design engineering</topic><topic>Error correction</topic><topic>Error correction codes</topic><topic>Fault tolerance</topic><topic>Logic circuits</topic><topic>Logic gates</topic><topic>Physics computing</topic><topic>Quantum computing</topic><toplevel>online_resources</toplevel><creatorcontrib>Vasudevan, D.P.</creatorcontrib><creatorcontrib>Lala, P.K.</creatorcontrib><creatorcontrib>Parkerson, J.P.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Vasudevan, D.P.</au><au>Lala, P.K.</au><au>Parkerson, J.P.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>The construction of a fault tolerant reversible gate for quantum computation</atitle><btitle>5th IEEE Conference on Nanotechnology, 2005</btitle><stitle>NANO</stitle><date>2005</date><risdate>2005</risdate><spage>112</spage><epage>115 vol. 1</epage><pages>112-115 vol. 1</pages><issn>1944-9399</issn><eissn>1944-9380</eissn><isbn>0780391993</isbn><isbn>9780780391994</isbn><abstract>Fault tolerance plays a major role in quantum computer design. As the quantum environment is not stable enough when the information is read from it, better design techniques with error correcting capability are needed to overcome the information loss due to decoherence in quantum circuits. This paper presents a fault tolerant reversible gate that can be used in quantum computing systems.</abstract><pub>IEEE</pub><doi>10.1109/NANO.2005.1500705</doi></addata></record>
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1944-9380
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Computer errors
Computer science
Design engineering
Error correction
Error correction codes
Fault tolerance
Logic circuits
Logic gates
Physics computing
Quantum computing
title The construction of a fault tolerant reversible gate for quantum computation
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-24T15%3A49%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=The%20construction%20of%20a%20fault%20tolerant%20reversible%20gate%20for%20quantum%20computation&rft.btitle=5th%20IEEE%20Conference%20on%20Nanotechnology,%202005&rft.au=Vasudevan,%20D.P.&rft.date=2005&rft.spage=112&rft.epage=115%20vol.%201&rft.pages=112-115%20vol.%201&rft.issn=1944-9399&rft.eissn=1944-9380&rft.isbn=0780391993&rft.isbn_list=9780780391994&rft_id=info:doi/10.1109/NANO.2005.1500705&rft_dat=%3Cieee_6IE%3E1500705%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1500705&rfr_iscdi=true