A 6.25Gb/s binary adaptive DFE with first post-cursor tap cancellation for serial backplane communications
A 6.25 Gb/s serial receiver with a 4-tap adaptive DFE is implemented in a 0.13 /spl mu/m 7LM CMOS process. Direct cancellation of the first post-cursor ISI is achieved, enabling recovery of a data eye fully closed from channel losses and crosstalk. A BER
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Sprache: | eng |
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