Hot carrier degradation of lateral DMOS transistor capacitance and reliability issues
This paper reports on an experimental evaluation of the hot-carrier impact on capacitances of high voltage DMOS transistors and their correlation with the degradation of DC characteristics. Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltag...
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creator | Hefyene, N. Anghel, C. Gillon, R. Ionescu, A.M. |
description | This paper reports on an experimental evaluation of the hot-carrier impact on capacitances of high voltage DMOS transistors and their correlation with the degradation of DC characteristics. Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltage providing maximum body-current, I/sub Bmax/, and; (ii) stress-B: at maximum drain and gate voltages, which are the most relevant for device reliability. The proposed investigations experimentally distinguish among drift-region degradation, for stress-A, and gate oxide degradation near the source-end, for stress-B. In the case of stress-B, while traditional DC evaluation of stress impact suggests a significant shift in the DC parameters, the DMOS AC characteristics appear considerably altered. This suggests the importance of the systematic experimental evaluation of the impact of hot-carrier degradation of AC characteristics and its correlation with DC degradation in order to explain the degradation mechanisms. |
doi_str_mv | 10.1109/RELPHY.2005.1493146 |
format | Conference Proceeding |
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Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltage providing maximum body-current, I/sub Bmax/, and; (ii) stress-B: at maximum drain and gate voltages, which are the most relevant for device reliability. The proposed investigations experimentally distinguish among drift-region degradation, for stress-A, and gate oxide degradation near the source-end, for stress-B. In the case of stress-B, while traditional DC evaluation of stress impact suggests a significant shift in the DC parameters, the DMOS AC characteristics appear considerably altered. This suggests the importance of the systematic experimental evaluation of the impact of hot-carrier degradation of AC characteristics and its correlation with DC degradation in order to explain the degradation mechanisms.</description><identifier>ISSN: 1541-7026</identifier><identifier>ISBN: 0780388038</identifier><identifier>ISBN: 9780780388031</identifier><identifier>EISSN: 1938-1891</identifier><identifier>DOI: 10.1109/RELPHY.2005.1493146</identifier><language>eng</language><publisher>IEEE</publisher><subject>Breakdown voltage ; Capacitance measurement ; CMOS technology ; Degradation ; Hot carriers ; Scattering parameters ; Semiconductor device reliability ; Stress ; Switches ; Testing</subject><ispartof>2005 IEEE International Reliability Physics Symposium, 2005. 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Proceedings. 43rd Annual</title><addtitle>RELPHY</addtitle><description>This paper reports on an experimental evaluation of the hot-carrier impact on capacitances of high voltage DMOS transistors and their correlation with the degradation of DC characteristics. Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltage providing maximum body-current, I/sub Bmax/, and; (ii) stress-B: at maximum drain and gate voltages, which are the most relevant for device reliability. The proposed investigations experimentally distinguish among drift-region degradation, for stress-A, and gate oxide degradation near the source-end, for stress-B. In the case of stress-B, while traditional DC evaluation of stress impact suggests a significant shift in the DC parameters, the DMOS AC characteristics appear considerably altered. This suggests the importance of the systematic experimental evaluation of the impact of hot-carrier degradation of AC characteristics and its correlation with DC degradation in order to explain the degradation mechanisms.</description><subject>Breakdown voltage</subject><subject>Capacitance measurement</subject><subject>CMOS technology</subject><subject>Degradation</subject><subject>Hot carriers</subject><subject>Scattering parameters</subject><subject>Semiconductor device reliability</subject><subject>Stress</subject><subject>Switches</subject><subject>Testing</subject><issn>1541-7026</issn><issn>1938-1891</issn><isbn>0780388038</isbn><isbn>9780780388031</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotUM1OwzAYi_iRGGNPsEteoCNfkzTpEY3BkIqGgB04TV-TbyiotFMSDnt7ipgl2wdbPpixOYgFgKhvX1fNy_pjUQqhF6BqCao6YxOopS3A1nDOroWxQto_XoyBVlAYUVZXbJbSlxihtDSlnbDtesjcYYyBIvf0GdFjDkPPhz3vMFPEjt8_b954jtinkPIQx_oBXcjYO-LYex6pC9iGLuQjDyn9ULphl3vsEs1OPmXbh9X7cl00m8en5V1TBDA6F16DUI7A1wCmMnZUMqVzbm_KUlPlNEGLracW0RhvSy0VkVeAUlqFRk7Z_H83ENHuEMM3xuPu9Ij8BV-tVEc</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Hefyene, N.</creator><creator>Anghel, C.</creator><creator>Gillon, R.</creator><creator>Ionescu, A.M.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2005</creationdate><title>Hot carrier degradation of lateral DMOS transistor capacitance and reliability issues</title><author>Hefyene, N. ; Anghel, C. ; Gillon, R. ; Ionescu, A.M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-d5104ce1d9117678117e72cccf7225e6c5e1babdebaa77d82534eed41a3384a73</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Breakdown voltage</topic><topic>Capacitance measurement</topic><topic>CMOS technology</topic><topic>Degradation</topic><topic>Hot carriers</topic><topic>Scattering parameters</topic><topic>Semiconductor device reliability</topic><topic>Stress</topic><topic>Switches</topic><topic>Testing</topic><toplevel>online_resources</toplevel><creatorcontrib>Hefyene, N.</creatorcontrib><creatorcontrib>Anghel, C.</creatorcontrib><creatorcontrib>Gillon, R.</creatorcontrib><creatorcontrib>Ionescu, A.M.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hefyene, N.</au><au>Anghel, C.</au><au>Gillon, R.</au><au>Ionescu, A.M.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Hot carrier degradation of lateral DMOS transistor capacitance and reliability issues</atitle><btitle>2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual</btitle><stitle>RELPHY</stitle><date>2005</date><risdate>2005</risdate><spage>551</spage><epage>554</epage><pages>551-554</pages><issn>1541-7026</issn><eissn>1938-1891</eissn><isbn>0780388038</isbn><isbn>9780780388031</isbn><abstract>This paper reports on an experimental evaluation of the hot-carrier impact on capacitances of high voltage DMOS transistors and their correlation with the degradation of DC characteristics. Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltage providing maximum body-current, I/sub Bmax/, and; (ii) stress-B: at maximum drain and gate voltages, which are the most relevant for device reliability. The proposed investigations experimentally distinguish among drift-region degradation, for stress-A, and gate oxide degradation near the source-end, for stress-B. In the case of stress-B, while traditional DC evaluation of stress impact suggests a significant shift in the DC parameters, the DMOS AC characteristics appear considerably altered. This suggests the importance of the systematic experimental evaluation of the impact of hot-carrier degradation of AC characteristics and its correlation with DC degradation in order to explain the degradation mechanisms.</abstract><pub>IEEE</pub><doi>10.1109/RELPHY.2005.1493146</doi><tpages>4</tpages></addata></record> |
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ispartof | 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual, 2005, p.551-554 |
issn | 1541-7026 1938-1891 |
language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Breakdown voltage Capacitance measurement CMOS technology Degradation Hot carriers Scattering parameters Semiconductor device reliability Stress Switches Testing |
title | Hot carrier degradation of lateral DMOS transistor capacitance and reliability issues |
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