Hot-carrier memory effect in an Al/SiN/SiO2/Si MNOS diode due to electrical stress
An Al/SiN(70 Å)/SiO 2 (126 Å)/(p)Si MNOS diode was fabricated by using the LOCOS process. The interface trap densities at SiN-SiO 2 and at the SiO 2 -Si interface were measured by a CV method. Successive stresses of biasing at -20 V introduces both trap densities. Memory effect of the flat-band shif...
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| Veröffentlicht in: | IEEE electron device letters 1985-09, Vol.6 (9), p.448-449 |
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| container_end_page | 449 |
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| container_issue | 9 |
| container_start_page | 448 |
| container_title | IEEE electron device letters |
| container_volume | 6 |
| creator | Chang, C.Y. Tzeng, F.C. Chen, C.T. Mao, Y.W. |
| description | An Al/SiN(70 Å)/SiO 2 (126 Å)/(p)Si MNOS diode was fabricated by using the LOCOS process. The interface trap densities at SiN-SiO 2 and at the SiO 2 -Si interface were measured by a CV method. Successive stresses of biasing at -20 V introduces both trap densities. Memory effect of the flat-band shifts was observed. The electron traps were first produced at the SiN-SiO 2 interface. In addition, the hole traps were also produced owing to the two-step barrier formation in the insulators. Fowler-Nordheim tunneling may be responsible for the trapping in the oxide. The hole traps can be annealed while the electron traps cannot be. |
| doi_str_mv | 10.1109/EDL.1985.26188 |
| format | Article |
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The interface trap densities at SiN-SiO 2 and at the SiO 2 -Si interface were measured by a CV method. Successive stresses of biasing at -20 V introduces both trap densities. Memory effect of the flat-band shifts was observed. The electron traps were first produced at the SiN-SiO 2 interface. In addition, the hole traps were also produced owing to the two-step barrier formation in the insulators. Fowler-Nordheim tunneling may be responsible for the trapping in the oxide. The hole traps can be annealed while the electron traps cannot be.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/EDL.1985.26188</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Annealing ; Applied sciences ; Density measurement ; Diodes ; Electron traps ; Electronics ; Exact sciences and technology ; Hot carrier effects ; Hot carriers ; Insulation ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Silicon compounds ; Stress ; Tunneling</subject><ispartof>IEEE electron device letters, 1985-09, Vol.6 (9), p.448-449</ispartof><rights>1986 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1485341$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1485341$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=8685263$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Chang, C.Y.</creatorcontrib><creatorcontrib>Tzeng, F.C.</creatorcontrib><creatorcontrib>Chen, C.T.</creatorcontrib><creatorcontrib>Mao, Y.W.</creatorcontrib><title>Hot-carrier memory effect in an Al/SiN/SiO2/Si MNOS diode due to electrical stress</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>An Al/SiN(70 Å)/SiO 2 (126 Å)/(p)Si MNOS diode was fabricated by using the LOCOS process. The interface trap densities at SiN-SiO 2 and at the SiO 2 -Si interface were measured by a CV method. Successive stresses of biasing at -20 V introduces both trap densities. Memory effect of the flat-band shifts was observed. The electron traps were first produced at the SiN-SiO 2 interface. In addition, the hole traps were also produced owing to the two-step barrier formation in the insulators. Fowler-Nordheim tunneling may be responsible for the trapping in the oxide. The hole traps can be annealed while the electron traps cannot be.</description><subject>Annealing</subject><subject>Applied sciences</subject><subject>Density measurement</subject><subject>Diodes</subject><subject>Electron traps</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Hot carrier effects</subject><subject>Hot carriers</subject><subject>Insulation</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicon compounds</subject><subject>Stress</subject><subject>Tunneling</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1985</creationdate><recordtype>article</recordtype><recordid>eNo9jU1LAzEQhoMoWKtXL15y8LptJl-bPZbaWmHtgtVzSZNZiGx3S7Ie-u8NVORlZg7Pw7yEPAKbAbBqvnqpZ1AZNeMajLkiE1DKFExpcU0mrJRQCGD6ltyl9M0YSFnKCfnYDGPhbIwBIz3icYhnim2LbqShp7ani26-C9s8Dc-Lvm-bHfVh8Ej9D9JxoNhlOQZnO5rGiCndk5vWdgkf_u6UfK1Xn8tNUTevb8tFXQQQcizwoJhwQhkGnFfSO8-tcbyUra5UBh48Gq9yJJa2FIppWzqBABzEwYOYkufL35NNub2Ntnch7U8xHG087402imuRtaeLFhDxn4I0SkgQv7qoWNA</recordid><startdate>198509</startdate><enddate>198509</enddate><creator>Chang, C.Y.</creator><creator>Tzeng, F.C.</creator><creator>Chen, C.T.</creator><creator>Mao, Y.W.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope></search><sort><creationdate>198509</creationdate><title>Hot-carrier memory effect in an Al/SiN/SiO2/Si MNOS diode due to electrical stress</title><author>Chang, C.Y. ; Tzeng, F.C. ; Chen, C.T. ; Mao, Y.W.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i134t-eb503c358012294dcd2a8c274f6953c3d1de8d5d5d4e7a73506a7c3e11213bd13</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1985</creationdate><topic>Annealing</topic><topic>Applied sciences</topic><topic>Density measurement</topic><topic>Diodes</topic><topic>Electron traps</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Hot carrier effects</topic><topic>Hot carriers</topic><topic>Insulation</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicon compounds</topic><topic>Stress</topic><topic>Tunneling</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chang, C.Y.</creatorcontrib><creatorcontrib>Tzeng, F.C.</creatorcontrib><creatorcontrib>Chen, C.T.</creatorcontrib><creatorcontrib>Mao, Y.W.</creatorcontrib><collection>Pascal-Francis</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chang, C.Y.</au><au>Tzeng, F.C.</au><au>Chen, C.T.</au><au>Mao, Y.W.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Hot-carrier memory effect in an Al/SiN/SiO2/Si MNOS diode due to electrical stress</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>1985-09</date><risdate>1985</risdate><volume>6</volume><issue>9</issue><spage>448</spage><epage>449</epage><pages>448-449</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>An Al/SiN(70 Å)/SiO 2 (126 Å)/(p)Si MNOS diode was fabricated by using the LOCOS process. The interface trap densities at SiN-SiO 2 and at the SiO 2 -Si interface were measured by a CV method. Successive stresses of biasing at -20 V introduces both trap densities. Memory effect of the flat-band shifts was observed. The electron traps were first produced at the SiN-SiO 2 interface. In addition, the hole traps were also produced owing to the two-step barrier formation in the insulators. Fowler-Nordheim tunneling may be responsible for the trapping in the oxide. The hole traps can be annealed while the electron traps cannot be.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/EDL.1985.26188</doi><tpages>2</tpages></addata></record> |
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| identifier | ISSN: 0741-3106 |
| ispartof | IEEE electron device letters, 1985-09, Vol.6 (9), p.448-449 |
| issn | 0741-3106 1558-0563 |
| language | eng |
| recordid | cdi_ieee_primary_1485341 |
| source | IEEE Electronic Library (IEL) |
| subjects | Annealing Applied sciences Density measurement Diodes Electron traps Electronics Exact sciences and technology Hot carrier effects Hot carriers Insulation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon compounds Stress Tunneling |
| title | Hot-carrier memory effect in an Al/SiN/SiO2/Si MNOS diode due to electrical stress |
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