A two-chip, 4-MHz, microelectromechanical reference oscillator
The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimized to offer large quality factors (22000), while maintaining tunability in excess of 3000 ppm for fine tuning and temperature...
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creator | Sundaresan, K. Ho, G.K. Pourkamali, S. Ayazi, F. |
description | The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimized to offer large quality factors (22000), while maintaining tunability in excess of 3000 ppm for fine tuning and temperature compensation. Oscillations are sustained with a CMOS amplifier and temperature compensation is performed with a novel resonator bias generator. When interfaced with the bias circuit, the oscillator exhibits a temperature drift of 380 ppm over a 90/spl deg/C range, a 6 times improvement in stability over an uncompensated oscillator. The sustaining amplifier and compensation circuitry were fabricated in a 2P3M 0.5 /spl mu/m CMOS process. The oscillator is designed to prototype highly stable, low phase-noise reference oscillators integrated at the chip or package level. |
doi_str_mv | 10.1109/ISCAS.2005.1465872 |
format | Conference Proceeding |
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The design of the resonator has been optimized to offer large quality factors (22000), while maintaining tunability in excess of 3000 ppm for fine tuning and temperature compensation. Oscillations are sustained with a CMOS amplifier and temperature compensation is performed with a novel resonator bias generator. When interfaced with the bias circuit, the oscillator exhibits a temperature drift of 380 ppm over a 90/spl deg/C range, a 6 times improvement in stability over an uncompensated oscillator. The sustaining amplifier and compensation circuitry were fabricated in a 2P3M 0.5 /spl mu/m CMOS process. The oscillator is designed to prototype highly stable, low phase-noise reference oscillators integrated at the chip or package level.</description><identifier>ISSN: 0271-4302</identifier><identifier>ISBN: 9780780388345</identifier><identifier>ISBN: 0780388348</identifier><identifier>EISSN: 2158-1525</identifier><identifier>DOI: 10.1109/ISCAS.2005.1465872</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit optimization ; Circuit stability ; CMOS process ; Design optimization ; Oscillators ; Prototypes ; Q factor ; Silicon ; Temperature distribution ; Tuning</subject><ispartof>2005 IEEE International Symposium on Circuits and Systems (ISCAS), 2005, p.5461-5464 Vol. 6</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1465872$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>310,311,781,785,790,791,2059,4051,4052,27930,54925</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1465872$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Sundaresan, K.</creatorcontrib><creatorcontrib>Ho, G.K.</creatorcontrib><creatorcontrib>Pourkamali, S.</creatorcontrib><creatorcontrib>Ayazi, F.</creatorcontrib><title>A two-chip, 4-MHz, microelectromechanical reference oscillator</title><title>2005 IEEE International Symposium on Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimized to offer large quality factors (22000), while maintaining tunability in excess of 3000 ppm for fine tuning and temperature compensation. Oscillations are sustained with a CMOS amplifier and temperature compensation is performed with a novel resonator bias generator. When interfaced with the bias circuit, the oscillator exhibits a temperature drift of 380 ppm over a 90/spl deg/C range, a 6 times improvement in stability over an uncompensated oscillator. The sustaining amplifier and compensation circuitry were fabricated in a 2P3M 0.5 /spl mu/m CMOS process. The oscillator is designed to prototype highly stable, low phase-noise reference oscillators integrated at the chip or package level.</description><subject>Circuit optimization</subject><subject>Circuit stability</subject><subject>CMOS process</subject><subject>Design optimization</subject><subject>Oscillators</subject><subject>Prototypes</subject><subject>Q factor</subject><subject>Silicon</subject><subject>Temperature distribution</subject><subject>Tuning</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>9780780388345</isbn><isbn>0780388348</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tKw0AYRgcvYKh5Ad3kATpx7jPZCCFYW6i4qK7Ln8k_dCRpyiQg-vQW7MeBszvwEfLAWck5q542u6belYIxXXJltLPiimSCa0e5Fvqa5JV17Ix0Tip9QzImLKdKMnFH8mn6YucpLa0wGXmui_l7pP4QT8tC0bf177IYok8j9ujnNA7oD3CMHvoiYcCER4_FOPnY9zCP6Z7cBugnzC9ekM_Vy0ezptv3101Tb2nkVs-0aoORpoPWcquCBAAjjFTB8gBdF5QHrQRTzkGwYEXFKiYt97wFLwGxlQvy-N-NiLg_pThA-tlf3ss_2qhLpw</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Sundaresan, K.</creator><creator>Ho, G.K.</creator><creator>Pourkamali, S.</creator><creator>Ayazi, F.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2005</creationdate><title>A two-chip, 4-MHz, microelectromechanical reference oscillator</title><author>Sundaresan, K. ; Ho, G.K. ; Pourkamali, S. ; Ayazi, F.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-9bf636dab7174f3aaa62634f71faddf4ca5420488af7a729090371c1bac3aeeb3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Circuit optimization</topic><topic>Circuit stability</topic><topic>CMOS process</topic><topic>Design optimization</topic><topic>Oscillators</topic><topic>Prototypes</topic><topic>Q factor</topic><topic>Silicon</topic><topic>Temperature distribution</topic><topic>Tuning</topic><toplevel>online_resources</toplevel><creatorcontrib>Sundaresan, K.</creatorcontrib><creatorcontrib>Ho, G.K.</creatorcontrib><creatorcontrib>Pourkamali, S.</creatorcontrib><creatorcontrib>Ayazi, F.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sundaresan, K.</au><au>Ho, G.K.</au><au>Pourkamali, S.</au><au>Ayazi, F.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A two-chip, 4-MHz, microelectromechanical reference oscillator</atitle><btitle>2005 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2005</date><risdate>2005</risdate><spage>5461</spage><epage>5464 Vol. 6</epage><pages>5461-5464 Vol. 6</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>9780780388345</isbn><isbn>0780388348</isbn><abstract>The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimized to offer large quality factors (22000), while maintaining tunability in excess of 3000 ppm for fine tuning and temperature compensation. Oscillations are sustained with a CMOS amplifier and temperature compensation is performed with a novel resonator bias generator. When interfaced with the bias circuit, the oscillator exhibits a temperature drift of 380 ppm over a 90/spl deg/C range, a 6 times improvement in stability over an uncompensated oscillator. The sustaining amplifier and compensation circuitry were fabricated in a 2P3M 0.5 /spl mu/m CMOS process. The oscillator is designed to prototype highly stable, low phase-noise reference oscillators integrated at the chip or package level.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2005.1465872</doi></addata></record> |
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subjects | Circuit optimization Circuit stability CMOS process Design optimization Oscillators Prototypes Q factor Silicon Temperature distribution Tuning |
title | A two-chip, 4-MHz, microelectromechanical reference oscillator |
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