Bias dependence of buried oxide hardness during total dose irradiation
Direct correlation is reported between single-transistor back channel leakage and the anomalous increase in 16 K-SRAM standby current after total dose irradiation. 16 K-SRAMs fabricated on SIMOX (separation by implantation of oxygen) substrates were total-dose tested up to 10 Mrad (SiO/sub 2/) using...
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creator | Yue, C.S. Kueng, J. Fechner, P. Randazzo, T. |
description | Direct correlation is reported between single-transistor back channel leakage and the anomalous increase in 16 K-SRAM standby current after total dose irradiation. 16 K-SRAMs fabricated on SIMOX (separation by implantation of oxygen) substrates were total-dose tested up to 10 Mrad (SiO/sub 2/) using an ARACOR X-ray source with zero substrate bias. Different bias conditions were examined to determine the worst case condition for the buried oxide. The worst bias condition for back channel buried oxide threshold voltage shift is when irradiated with zero substrate bias. The standby current hump of the 16 K-SRAM after total dose irradiation can be directly correlated with the NMOS transistor back channel leakage current. Reduction of standby current with increased total dose can be explained by the buildup of interface charge which reduces the back channel leakage.< > |
doi_str_mv | 10.1109/SOSSOI.1990.145768 |
format | Conference Proceeding |
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Different bias conditions were examined to determine the worst case condition for the buried oxide. The worst bias condition for back channel buried oxide threshold voltage shift is when irradiated with zero substrate bias. The standby current hump of the 16 K-SRAM after total dose irradiation can be directly correlated with the NMOS transistor back channel leakage current. Reduction of standby current with increased total dose can be explained by the buildup of interface charge which reduces the back channel leakage.< ></description><identifier>ISBN: 0879425733</identifier><identifier>ISBN: 9780879425739</identifier><identifier>DOI: 10.1109/SOSSOI.1990.145768</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS process ; CMOS technology ; Current measurement ; Implants ; Leakage current ; MOS devices ; MOSFETs ; Random access memory ; Solid state circuits ; Threshold voltage</subject><ispartof>1990 IEEE SOS/SOI Technology Conference. Proceedings, 1990, p.173-174</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/145768$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/145768$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yue, C.S.</creatorcontrib><creatorcontrib>Kueng, J.</creatorcontrib><creatorcontrib>Fechner, P.</creatorcontrib><creatorcontrib>Randazzo, T.</creatorcontrib><title>Bias dependence of buried oxide hardness during total dose irradiation</title><title>1990 IEEE SOS/SOI Technology Conference. Proceedings</title><addtitle>SOSSOI</addtitle><description>Direct correlation is reported between single-transistor back channel leakage and the anomalous increase in 16 K-SRAM standby current after total dose irradiation. 16 K-SRAMs fabricated on SIMOX (separation by implantation of oxygen) substrates were total-dose tested up to 10 Mrad (SiO/sub 2/) using an ARACOR X-ray source with zero substrate bias. Different bias conditions were examined to determine the worst case condition for the buried oxide. The worst bias condition for back channel buried oxide threshold voltage shift is when irradiated with zero substrate bias. The standby current hump of the 16 K-SRAM after total dose irradiation can be directly correlated with the NMOS transistor back channel leakage current. Reduction of standby current with increased total dose can be explained by the buildup of interface charge which reduces the back channel leakage.< ></description><subject>CMOS process</subject><subject>CMOS technology</subject><subject>Current measurement</subject><subject>Implants</subject><subject>Leakage current</subject><subject>MOS devices</subject><subject>MOSFETs</subject><subject>Random access memory</subject><subject>Solid state circuits</subject><subject>Threshold voltage</subject><isbn>0879425733</isbn><isbn>9780879425739</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1990</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj1FLwzAUhQMiqNv-wJ7yBzpv2qZJHnU4HQz60L2P29wbjcx2JBX031uY5-XAx8eBI8RawUYpcI9d23XtfqOcm0GtTWNvxANY4-pSm6q6E6ucP2GO1tY29l7sniNmSXzhgXjwLMcg--8UmeT4E4nlByYaOM_OTId3OY0TniWNmWVMCSniFMdhKW4DnjOv_nshjruX4_atOLSv--3ToYjWTIUibhyYsoZA2ENQ3gXEUDoM1iAEb8FZ8qavtXd9ScahJQLtQTlVGaoWYn2djcx8uqT4hen3dD1a_QE4nEr2</recordid><startdate>1990</startdate><enddate>1990</enddate><creator>Yue, C.S.</creator><creator>Kueng, J.</creator><creator>Fechner, P.</creator><creator>Randazzo, T.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1990</creationdate><title>Bias dependence of buried oxide hardness during total dose irradiation</title><author>Yue, C.S. ; Kueng, J. ; Fechner, P. ; Randazzo, T.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i87t-1de6907240fdab0f1c9faaf29af87a0fc8098dc7b45c9b2d79a8dd05c019137d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1990</creationdate><topic>CMOS process</topic><topic>CMOS technology</topic><topic>Current measurement</topic><topic>Implants</topic><topic>Leakage current</topic><topic>MOS devices</topic><topic>MOSFETs</topic><topic>Random access memory</topic><topic>Solid state circuits</topic><topic>Threshold voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Yue, C.S.</creatorcontrib><creatorcontrib>Kueng, J.</creatorcontrib><creatorcontrib>Fechner, P.</creatorcontrib><creatorcontrib>Randazzo, T.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yue, C.S.</au><au>Kueng, J.</au><au>Fechner, P.</au><au>Randazzo, T.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Bias dependence of buried oxide hardness during total dose irradiation</atitle><btitle>1990 IEEE SOS/SOI Technology Conference. Proceedings</btitle><stitle>SOSSOI</stitle><date>1990</date><risdate>1990</risdate><spage>173</spage><epage>174</epage><pages>173-174</pages><isbn>0879425733</isbn><isbn>9780879425739</isbn><abstract>Direct correlation is reported between single-transistor back channel leakage and the anomalous increase in 16 K-SRAM standby current after total dose irradiation. 16 K-SRAMs fabricated on SIMOX (separation by implantation of oxygen) substrates were total-dose tested up to 10 Mrad (SiO/sub 2/) using an ARACOR X-ray source with zero substrate bias. Different bias conditions were examined to determine the worst case condition for the buried oxide. The worst bias condition for back channel buried oxide threshold voltage shift is when irradiated with zero substrate bias. The standby current hump of the 16 K-SRAM after total dose irradiation can be directly correlated with the NMOS transistor back channel leakage current. Reduction of standby current with increased total dose can be explained by the buildup of interface charge which reduces the back channel leakage.< ></abstract><pub>IEEE</pub><doi>10.1109/SOSSOI.1990.145768</doi><tpages>2</tpages></addata></record> |
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subjects | CMOS process CMOS technology Current measurement Implants Leakage current MOS devices MOSFETs Random access memory Solid state circuits Threshold voltage |
title | Bias dependence of buried oxide hardness during total dose irradiation |
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