Measures to improve delay fault testing on low-cost testers - a case study

This paper addresses delay test for SOC devices on low-cost testers. The case study focuses on the at-speed testing for a state-of the-art microcontroller device by using an on-chip high-speed clock generator. The experimental results show that the simple on-chip high-speed clock generator is not su...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Beck, M., Barondeau, O., Poehl, F., Xijiang Lin, Press, R.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Automatic test pattern generation Automatic testing Circuit faults Circuit testing Clocks Computer aided software engineering Delay Phase locked loops Production Pulse generation
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