Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control
We demonstrate a new MOSFET on ultra-thin BOX that allows wide-range back-bias control in low-power and high-performance applications. The back gate is effective not only to increase the drive current by about 20% in active mode but also in reduce the off-current by an order of magnitude in stand-by...
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| creator | Tsuchiya, R. Horiuchi, M. Kimura, S. Yamaoka, M. Kawahara, T. Maegawa, S. Ipposhi, T. Ohji, Y. Matsuoka, H. |
| description | We demonstrate a new MOSFET on ultra-thin BOX that allows wide-range back-bias control in low-power and high-performance applications. The back gate is effective not only to increase the drive current by about 20% in active mode but also in reduce the off-current by an order of magnitude in stand-by mode. We have also demonstrated tunable-threshold-voltage technology for devices with metal gates and ion implantation for V/sub th/ control. The target V/sub th/ for low-power applications was achieved by using ion implantation for V/sub th/ control. We propose a 6-transistor SRAM memory cell in which we obtain even more benefit from the new device structure by adding a feedback mechanism. A proposed 6-Tr SRAM memory cell is shown to dramatically improve SNM characteristics at the 65-nm technology nodes, and this effect will also apply at finer nodes. |
| doi_str_mv | 10.1109/IEDM.2004.1419245 |
| format | Conference Proceeding |
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The back gate is effective not only to increase the drive current by about 20% in active mode but also in reduce the off-current by an order of magnitude in stand-by mode. We have also demonstrated tunable-threshold-voltage technology for devices with metal gates and ion implantation for V/sub th/ control. The target V/sub th/ for low-power applications was achieved by using ion implantation for V/sub th/ control. We propose a 6-transistor SRAM memory cell in which we obtain even more benefit from the new device structure by adding a feedback mechanism. A proposed 6-Tr SRAM memory cell is shown to dramatically improve SNM characteristics at the 65-nm technology nodes, and this effect will also apply at finer nodes.</description><identifier>ISBN: 0780386841</identifier><identifier>ISBN: 9780780386846</identifier><identifier>DOI: 10.1109/IEDM.2004.1419245</identifier><language>eng</language><publisher>Piscataway NJ: IEEE</publisher><subject>Applied sciences ; Centralized control ; CMOS technology ; CMOSFETs ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Ion implantation ; Magnetic and optical mass memories ; Microelectronic fabrication (materials and surfaces technology) ; MOSFET circuits ; Power MOSFET ; Random access memory ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Silicon ; Storage and reproduction of information ; Threshold voltage ; Transistors ; Voltage control</subject><ispartof>IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.631-634</ispartof><rights>2006 INIST-CNRS</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1419245$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1419245$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=17806494$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Tsuchiya, R.</creatorcontrib><creatorcontrib>Horiuchi, M.</creatorcontrib><creatorcontrib>Kimura, S.</creatorcontrib><creatorcontrib>Yamaoka, M.</creatorcontrib><creatorcontrib>Kawahara, T.</creatorcontrib><creatorcontrib>Maegawa, S.</creatorcontrib><creatorcontrib>Ipposhi, T.</creatorcontrib><creatorcontrib>Ohji, Y.</creatorcontrib><creatorcontrib>Matsuoka, H.</creatorcontrib><title>Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control</title><title>IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004</title><addtitle>IEDM</addtitle><description>We demonstrate a new MOSFET on ultra-thin BOX that allows wide-range back-bias control in low-power and high-performance applications. The back gate is effective not only to increase the drive current by about 20% in active mode but also in reduce the off-current by an order of magnitude in stand-by mode. We have also demonstrated tunable-threshold-voltage technology for devices with metal gates and ion implantation for V/sub th/ control. The target V/sub th/ for low-power applications was achieved by using ion implantation for V/sub th/ control. We propose a 6-transistor SRAM memory cell in which we obtain even more benefit from the new device structure by adding a feedback mechanism. A proposed 6-Tr SRAM memory cell is shown to dramatically improve SNM characteristics at the 65-nm technology nodes, and this effect will also apply at finer nodes.</description><subject>Applied sciences</subject><subject>Centralized control</subject><subject>CMOS technology</subject><subject>CMOSFETs</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Ion implantation</subject><subject>Magnetic and optical mass memories</subject><subject>Microelectronic fabrication (materials and surfaces technology)</subject><subject>MOSFET circuits</subject><subject>Power MOSFET</subject><subject>Random access memory</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicon</subject><subject>Storage and reproduction of information</subject><subject>Threshold voltage</subject><subject>Transistors</subject><subject>Voltage control</subject><isbn>0780386841</isbn><isbn>9780780386846</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2004</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFUNFKwzAUDYigzn2A-JIXHzOTNmkb33ROHWzsYQq-jdv0pot2bUgrxXc_3MAELxcu3HM453AIuRJ8JgTXt8vF43qWcC5nQgqdSHVCLnhe8LTICinOyLTvP3gcqSQv0nPys3WNM11L4w5719KHzfsdBdriSD0EqFx9oJ2NGNL5erN9WrxS2wXadCPz3YiB7l29Zx5D_B6gNUjB-ygJg4uSFmH4Cq6t6egqZAHaGmkJ5pOVDnoajYfQNZfk1ELT4_TvTshb9Jm_sNXmeTm_XzGXcDGwCniW56XNbJLnaKWVicqMQF5phdZorSslslIalRbIS5VxVRiurS0AU5Pk6YTcHHU99AYaG-MY1-98cAcI3zsRe8qklpF3feQ5RPyHj4Wmv5KlbGY</recordid><startdate>2004</startdate><enddate>2004</enddate><creator>Tsuchiya, R.</creator><creator>Horiuchi, M.</creator><creator>Kimura, S.</creator><creator>Yamaoka, M.</creator><creator>Kawahara, T.</creator><creator>Maegawa, S.</creator><creator>Ipposhi, T.</creator><creator>Ohji, Y.</creator><creator>Matsuoka, H.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope><scope>IQODW</scope></search><sort><creationdate>2004</creationdate><title>Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control</title><author>Tsuchiya, R. ; Horiuchi, M. ; Kimura, S. ; Yamaoka, M. ; Kawahara, T. ; Maegawa, S. ; Ipposhi, T. ; Ohji, Y. ; Matsuoka, H.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i201t-da0677bf6f277ef4f4256c1e0d95efc999d516b4c538e0b56058c09ff8ae3c273</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Applied sciences</topic><topic>Centralized control</topic><topic>CMOS technology</topic><topic>CMOSFETs</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Ion implantation</topic><topic>Magnetic and optical mass memories</topic><topic>Microelectronic fabrication (materials and surfaces technology)</topic><topic>MOSFET circuits</topic><topic>Power MOSFET</topic><topic>Random access memory</topic><topic>Semiconductor electronics. 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Solid state devices</topic><topic>Silicon</topic><topic>Storage and reproduction of information</topic><topic>Threshold voltage</topic><topic>Transistors</topic><topic>Voltage control</topic><toplevel>online_resources</toplevel><creatorcontrib>Tsuchiya, R.</creatorcontrib><creatorcontrib>Horiuchi, M.</creatorcontrib><creatorcontrib>Kimura, S.</creatorcontrib><creatorcontrib>Yamaoka, M.</creatorcontrib><creatorcontrib>Kawahara, T.</creatorcontrib><creatorcontrib>Maegawa, S.</creatorcontrib><creatorcontrib>Ipposhi, T.</creatorcontrib><creatorcontrib>Ohji, Y.</creatorcontrib><creatorcontrib>Matsuoka, H.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tsuchiya, R.</au><au>Horiuchi, M.</au><au>Kimura, S.</au><au>Yamaoka, M.</au><au>Kawahara, T.</au><au>Maegawa, S.</au><au>Ipposhi, T.</au><au>Ohji, Y.</au><au>Matsuoka, H.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control</atitle><btitle>IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004</btitle><stitle>IEDM</stitle><date>2004</date><risdate>2004</risdate><spage>631</spage><epage>634</epage><pages>631-634</pages><isbn>0780386841</isbn><isbn>9780780386846</isbn><abstract>We demonstrate a new MOSFET on ultra-thin BOX that allows wide-range back-bias control in low-power and high-performance applications. The back gate is effective not only to increase the drive current by about 20% in active mode but also in reduce the off-current by an order of magnitude in stand-by mode. We have also demonstrated tunable-threshold-voltage technology for devices with metal gates and ion implantation for V/sub th/ control. The target V/sub th/ for low-power applications was achieved by using ion implantation for V/sub th/ control. We propose a 6-transistor SRAM memory cell in which we obtain even more benefit from the new device structure by adding a feedback mechanism. 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| subjects | Applied sciences Centralized control CMOS technology CMOSFETs Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Ion implantation Magnetic and optical mass memories Microelectronic fabrication (materials and surfaces technology) MOSFET circuits Power MOSFET Random access memory Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Storage and reproduction of information Threshold voltage Transistors Voltage control |
| title | Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control |
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