3D graphics circuits for 3G multimedia terminals
Summary form only given. The development of system-on-chip technology drives various multimedia and even 3D graphics capabilities into 3G multimedia terminals. The 3D applications are attractive to the mobile market, however, implementing them requires a huge amount of parallel calculations and memo...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | 205 |
container_title | |
container_volume | |
creator | Ramchan Woo |
description | Summary form only given. The development of system-on-chip technology drives various multimedia and even 3D graphics capabilities into 3G multimedia terminals. The 3D applications are attractive to the mobile market, however, implementing them requires a huge amount of parallel calculations and memory bandwidth within the boundary of limited battery power. In this talk, we discuss 'how to' and 'where to' apply various circuits and architecture techniques to the 3D graphics pipeline to achieve low power consumption, with the example of RAMP (RAM processor) by KAIST research group and several other world-class mobile 3D engines. |
doi_str_mv | 10.1109/ISSOC.2004.1411186 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1411186</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1411186</ieee_id><sourcerecordid>1411186</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-bdaf5c6aa5f8bba9b88e4c4ff8f630b7c3ee01994c2b2be749af727d0c3947ef3</originalsourceid><addsrcrecordid>eNotj8tqAjEUQANSaLX-QLvJD8z0Zm4mj6VMWysILnQvSeZGI04rybjo31eoZ3N2Bw5jLwJqIcC-rbbbTVc3ALIWUghh1IRNQRtA07ZGPbJ5KSe4gVahxScG-M4P2V2OKRQeUg7XNBYefzLHJR-u5zEN1CfHR8pD-nbn8swe4k00v3vGdp8fu-6rWm-Wq26xrpKFsfK9i21QzrXReO-sN4ZkkDGaqBC8DkgEwloZGt940tK6qBvdQ0ArNUWcsdf_bCKi_SWnweXf_f0J_wDrDkKo</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>3D graphics circuits for 3G multimedia terminals</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Ramchan Woo</creator><creatorcontrib>Ramchan Woo</creatorcontrib><description>Summary form only given. The development of system-on-chip technology drives various multimedia and even 3D graphics capabilities into 3G multimedia terminals. The 3D applications are attractive to the mobile market, however, implementing them requires a huge amount of parallel calculations and memory bandwidth within the boundary of limited battery power. In this talk, we discuss 'how to' and 'where to' apply various circuits and architecture techniques to the 3D graphics pipeline to achieve low power consumption, with the example of RAMP (RAM processor) by KAIST research group and several other world-class mobile 3D engines.</description><identifier>ISBN: 0780385586</identifier><identifier>ISBN: 9780780385580</identifier><identifier>DOI: 10.1109/ISSOC.2004.1411186</identifier><language>eng</language><publisher>IEEE</publisher><subject>Bandwidth ; Batteries ; Circuits ; Energy consumption ; Graphics ; Multimedia systems ; Pipelines ; Random access memory ; Read-write memory ; System-on-a-chip</subject><ispartof>2004 International Symposium on System-on-Chip, 2004. Proceedings, 2004, p.205</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1411186$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1411186$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ramchan Woo</creatorcontrib><title>3D graphics circuits for 3G multimedia terminals</title><title>2004 International Symposium on System-on-Chip, 2004. Proceedings</title><addtitle>ISSOC</addtitle><description>Summary form only given. The development of system-on-chip technology drives various multimedia and even 3D graphics capabilities into 3G multimedia terminals. The 3D applications are attractive to the mobile market, however, implementing them requires a huge amount of parallel calculations and memory bandwidth within the boundary of limited battery power. In this talk, we discuss 'how to' and 'where to' apply various circuits and architecture techniques to the 3D graphics pipeline to achieve low power consumption, with the example of RAMP (RAM processor) by KAIST research group and several other world-class mobile 3D engines.</description><subject>Bandwidth</subject><subject>Batteries</subject><subject>Circuits</subject><subject>Energy consumption</subject><subject>Graphics</subject><subject>Multimedia systems</subject><subject>Pipelines</subject><subject>Random access memory</subject><subject>Read-write memory</subject><subject>System-on-a-chip</subject><isbn>0780385586</isbn><isbn>9780780385580</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2004</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tqAjEUQANSaLX-QLvJD8z0Zm4mj6VMWysILnQvSeZGI04rybjo31eoZ3N2Bw5jLwJqIcC-rbbbTVc3ALIWUghh1IRNQRtA07ZGPbJ5KSe4gVahxScG-M4P2V2OKRQeUg7XNBYefzLHJR-u5zEN1CfHR8pD-nbn8swe4k00v3vGdp8fu-6rWm-Wq26xrpKFsfK9i21QzrXReO-sN4ZkkDGaqBC8DkgEwloZGt940tK6qBvdQ0ArNUWcsdf_bCKi_SWnweXf_f0J_wDrDkKo</recordid><startdate>2004</startdate><enddate>2004</enddate><creator>Ramchan Woo</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2004</creationdate><title>3D graphics circuits for 3G multimedia terminals</title><author>Ramchan Woo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-bdaf5c6aa5f8bba9b88e4c4ff8f630b7c3ee01994c2b2be749af727d0c3947ef3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Bandwidth</topic><topic>Batteries</topic><topic>Circuits</topic><topic>Energy consumption</topic><topic>Graphics</topic><topic>Multimedia systems</topic><topic>Pipelines</topic><topic>Random access memory</topic><topic>Read-write memory</topic><topic>System-on-a-chip</topic><toplevel>online_resources</toplevel><creatorcontrib>Ramchan Woo</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ramchan Woo</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>3D graphics circuits for 3G multimedia terminals</atitle><btitle>2004 International Symposium on System-on-Chip, 2004. Proceedings</btitle><stitle>ISSOC</stitle><date>2004</date><risdate>2004</risdate><spage>205</spage><pages>205-</pages><isbn>0780385586</isbn><isbn>9780780385580</isbn><abstract>Summary form only given. The development of system-on-chip technology drives various multimedia and even 3D graphics capabilities into 3G multimedia terminals. The 3D applications are attractive to the mobile market, however, implementing them requires a huge amount of parallel calculations and memory bandwidth within the boundary of limited battery power. In this talk, we discuss 'how to' and 'where to' apply various circuits and architecture techniques to the 3D graphics pipeline to achieve low power consumption, with the example of RAMP (RAM processor) by KAIST research group and several other world-class mobile 3D engines.</abstract><pub>IEEE</pub><doi>10.1109/ISSOC.2004.1411186</doi></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISBN: 0780385586 |
ispartof | 2004 International Symposium on System-on-Chip, 2004. Proceedings, 2004, p.205 |
issn | |
language | eng |
recordid | cdi_ieee_primary_1411186 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Bandwidth Batteries Circuits Energy consumption Graphics Multimedia systems Pipelines Random access memory Read-write memory System-on-a-chip |
title | 3D graphics circuits for 3G multimedia terminals |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T14%3A00%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=3D%20graphics%20circuits%20for%203G%20multimedia%20terminals&rft.btitle=2004%20International%20Symposium%20on%20System-on-Chip,%202004.%20Proceedings&rft.au=Ramchan%20Woo&rft.date=2004&rft.spage=205&rft.pages=205-&rft.isbn=0780385586&rft.isbn_list=9780780385580&rft_id=info:doi/10.1109/ISSOC.2004.1411186&rft_dat=%3Cieee_6IE%3E1411186%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1411186&rfr_iscdi=true |