A design for test technique for parametric analysis of SRAM: on-die low yield analysis

Parametric analysis of microprocessor SRAM through special design for test features (DFT) is used extensively by fault isolation and failure analysis engineers to find and characterize defects. Unfortunately, a growing amount of leakage on each new process is distorting these low yield analysis (LYA...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Mauck, B.M., Ravichandran, V., Mughal, U.A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Applied sciences Circuit faults Circuit simulation Circuit testing CMOS process Design engineering Design for testability Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Failure analysis Integrated circuits Integrated circuits by function (including memories and processors) Microprocessors Random access memory Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Testing, measurement, noise and reliability Transistors
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Schreiben Sie den ersten Kommentar!