A unified architecture for adaptive compression of data and code on embedded systems

We present an architecture for compression/decompression of executable files running on embedded systems. Compression is important for memory reduction purposes; previous work on memory reduction for embedded systems has focused on compressing the instruction segment of executable code before execut...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Lekatsas, H., Henkel, J., Venkata Jakkula, Srimat Chakradhar
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Algorithm design and analysis Cellular phones Compression algorithms Degradation Embedded system Laboratories Memory management National electric code Runtime Video compression
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page	123
container_issue
container_start_page	117
container_title
container_volume
creator	Lekatsas, H. Henkel, J. Venkata Jakkula Srimat Chakradhar
description	We present an architecture for compression/decompression of executable files running on embedded systems. Compression is important for memory reduction purposes; previous work on memory reduction for embedded systems has focused on compressing the instruction segment of executable code before execution and decompressing at runtime. Our work has shown that solely compressing the instruction segment is not enough as in many cases executable files contain large data areas that would benefit from compression as well. Compressing data areas presents new challenges to the embedded system designer; data can be modified during execution and therefore a fast compression algorithm and intelligent memory management are required as well. We propose a novel compression/decompression framework that can handle both instructions and data and show memory reductions over 50% while keeping performance degradation within 12%.
doi_str_mv	10.1109/ICVD.2005.36
format	Conference Proceeding
fullrecord	<record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1383263</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1383263</ieee_id><sourcerecordid>1383263</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-a176317a0b3b3fc056fc70ed7da9c4b5634aabcf71f53599f6a7eb74fac89a933</originalsourceid><addsrcrecordid>eNotzLtqwzAUgGHRCzRJu3Xrohewe-RjSdYY0lsg0MV0DcfSEVWp7WA5hbx9A-30wzf8QtwrKJUC97jdfDyVFYAu0VyIRYUNFMZVeCmWYI3TVWVqfSUWCgwWzhh7I5Y5fwFAo8EuRLuWxyHFxEHS5D_TzH4-TizjOEkKdJjTD0s_9oeJc07jIMcoA80kaQhnDyzPxn3HIZwX-ZRn7vOtuI70nfnuvyvRvjy3m7di9_663ax3RXIwF6SsQWUJOuwwetAmegscbCDn604brIk6H62KGrVz0ZDlztaRfOPIIa7Ew982MfP-MKWeptNeYYOVQfwFB6FRjQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A unified architecture for adaptive compression of data and code on embedded systems</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Lekatsas, H. ; Henkel, J. ; Venkata Jakkula ; Srimat Chakradhar</creator><creatorcontrib>Lekatsas, H. ; Henkel, J. ; Venkata Jakkula ; Srimat Chakradhar</creatorcontrib><description>We present an architecture for compression/decompression of executable files running on embedded systems. Compression is important for memory reduction purposes; previous work on memory reduction for embedded systems has focused on compressing the instruction segment of executable code before execution and decompressing at runtime. Our work has shown that solely compressing the instruction segment is not enough as in many cases executable files contain large data areas that would benefit from compression as well. Compressing data areas presents new challenges to the embedded system designer; data can be modified during execution and therefore a fast compression algorithm and intelligent memory management are required as well. We propose a novel compression/decompression framework that can handle both instructions and data and show memory reductions over 50% while keeping performance degradation within 12%.</description><identifier>ISSN: 1063-9667</identifier><identifier>ISBN: 0769522645</identifier><identifier>ISBN: 9780769522647</identifier><identifier>EISSN: 2380-6923</identifier><identifier>DOI: 10.1109/ICVD.2005.36</identifier><language>eng</language><publisher>IEEE</publisher><subject>Algorithm design and analysis ; Cellular phones ; Compression algorithms ; Degradation ; Embedded system ; Laboratories ; Memory management ; National electric code ; Runtime ; Video compression</subject><ispartof>18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005, p.117-123</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1383263$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1383263$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lekatsas, H.</creatorcontrib><creatorcontrib>Henkel, J.</creatorcontrib><creatorcontrib>Venkata Jakkula</creatorcontrib><creatorcontrib>Srimat Chakradhar</creatorcontrib><title>A unified architecture for adaptive compression of data and code on embedded systems</title><title>18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design</title><addtitle>ICVD</addtitle><description>We present an architecture for compression/decompression of executable files running on embedded systems. Compression is important for memory reduction purposes; previous work on memory reduction for embedded systems has focused on compressing the instruction segment of executable code before execution and decompressing at runtime. Our work has shown that solely compressing the instruction segment is not enough as in many cases executable files contain large data areas that would benefit from compression as well. Compressing data areas presents new challenges to the embedded system designer; data can be modified during execution and therefore a fast compression algorithm and intelligent memory management are required as well. We propose a novel compression/decompression framework that can handle both instructions and data and show memory reductions over 50% while keeping performance degradation within 12%.</description><subject>Algorithm design and analysis</subject><subject>Cellular phones</subject><subject>Compression algorithms</subject><subject>Degradation</subject><subject>Embedded system</subject><subject>Laboratories</subject><subject>Memory management</subject><subject>National electric code</subject><subject>Runtime</subject><subject>Video compression</subject><issn>1063-9667</issn><issn>2380-6923</issn><isbn>0769522645</isbn><isbn>9780769522647</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzLtqwzAUgGHRCzRJu3Xrohewe-RjSdYY0lsg0MV0DcfSEVWp7WA5hbx9A-30wzf8QtwrKJUC97jdfDyVFYAu0VyIRYUNFMZVeCmWYI3TVWVqfSUWCgwWzhh7I5Y5fwFAo8EuRLuWxyHFxEHS5D_TzH4-TizjOEkKdJjTD0s_9oeJc07jIMcoA80kaQhnDyzPxn3HIZwX-ZRn7vOtuI70nfnuvyvRvjy3m7di9_663ax3RXIwF6SsQWUJOuwwetAmegscbCDn604brIk6H62KGrVz0ZDlztaRfOPIIa7Ew982MfP-MKWeptNeYYOVQfwFB6FRjQ</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Lekatsas, H.</creator><creator>Henkel, J.</creator><creator>Venkata Jakkula</creator><creator>Srimat Chakradhar</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2005</creationdate><title>A unified architecture for adaptive compression of data and code on embedded systems</title><author>Lekatsas, H. ; Henkel, J. ; Venkata Jakkula ; Srimat Chakradhar</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-a176317a0b3b3fc056fc70ed7da9c4b5634aabcf71f53599f6a7eb74fac89a933</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Algorithm design and analysis</topic><topic>Cellular phones</topic><topic>Compression algorithms</topic><topic>Degradation</topic><topic>Embedded system</topic><topic>Laboratories</topic><topic>Memory management</topic><topic>National electric code</topic><topic>Runtime</topic><topic>Video compression</topic><toplevel>online_resources</toplevel><creatorcontrib>Lekatsas, H.</creatorcontrib><creatorcontrib>Henkel, J.</creatorcontrib><creatorcontrib>Venkata Jakkula</creatorcontrib><creatorcontrib>Srimat Chakradhar</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lekatsas, H.</au><au>Henkel, J.</au><au>Venkata Jakkula</au><au>Srimat Chakradhar</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A unified architecture for adaptive compression of data and code on embedded systems</atitle><btitle>18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design</btitle><stitle>ICVD</stitle><date>2005</date><risdate>2005</risdate><spage>117</spage><epage>123</epage><pages>117-123</pages><issn>1063-9667</issn><eissn>2380-6923</eissn><isbn>0769522645</isbn><isbn>9780769522647</isbn><abstract>We present an architecture for compression/decompression of executable files running on embedded systems. Compression is important for memory reduction purposes; previous work on memory reduction for embedded systems has focused on compressing the instruction segment of executable code before execution and decompressing at runtime. Our work has shown that solely compressing the instruction segment is not enough as in many cases executable files contain large data areas that would benefit from compression as well. Compressing data areas presents new challenges to the embedded system designer; data can be modified during execution and therefore a fast compression algorithm and intelligent memory management are required as well. We propose a novel compression/decompression framework that can handle both instructions and data and show memory reductions over 50% while keeping performance degradation within 12%.</abstract><pub>IEEE</pub><doi>10.1109/ICVD.2005.36</doi><tpages>7</tpages></addata></record>
fulltext	fulltext_linktorsrc
identifier	ISSN: 1063-9667
ispartof	18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005, p.117-123
issn	1063-9667 2380-6923
language	eng
recordid	cdi_ieee_primary_1383263
source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	Algorithm design and analysis Cellular phones Compression algorithms Degradation Embedded system Laboratories Memory management National electric code Runtime Video compression
title	A unified architecture for adaptive compression of data and code on embedded systems
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-20T09%3A49%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20unified%20architecture%20for%20adaptive%20compression%20of%20data%20and%20code%20on%20embedded%20systems&rft.btitle=18th%20International%20Conference%20on%20VLSI%20Design%20held%20jointly%20with%204th%20International%20Conference%20on%20Embedded%20Systems%20Design&rft.au=Lekatsas,%20H.&rft.date=2005&rft.spage=117&rft.epage=123&rft.pages=117-123&rft.issn=1063-9667&rft.eissn=2380-6923&rft.isbn=0769522645&rft.isbn_list=9780769522647&rft_id=info:doi/10.1109/ICVD.2005.36&rft_dat=%3Cieee_6IE%3E1383263%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1383263&rfr_iscdi=true