A 90nm high volume manufacturing logic technology featuring Cu metallization and CDO low-k ILD interconnects on 300 mm wafers
A leading edge 90 nm, 300 mm wafer size interconnect technology featuring Cu, CDO low-k ILD and industry's most aggressive 220 nm minimum metal pitch is being ramped into production for high performance Pentium/spl reg/ microprocessors, the first in industry, to our knowledge. Key enabling feat...
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| creator | Jan, C.H. Anand, N. Allen, C. Bielefeld, J. Buehler, M. Chikamane, V. Fischer, K. Jain, K. Jeong, J. Klopcic, S. Marieb, T. Miner, B. Nguyen, P. Schmitz, A. Nashner, M. Scherban, T. Schroeder, B. Ward, C. Wu, R. Zawadzki, K. Thompson, S. Bohr, M. |
| description | A leading edge 90 nm, 300 mm wafer size interconnect technology featuring Cu, CDO low-k ILD and industry's most aggressive 220 nm minimum metal pitch is being ramped into production for high performance Pentium/spl reg/ microprocessors, the first in industry, to our knowledge. Key enabling features for yield and reliability improvement to resolve challenges from weak thermo-mechanical properties of low k ILD and tight metal pitches for a production worthy interconnect process are presented. |
| doi_str_mv | 10.1109/IITC.2004.1345747 |
| format | Conference Proceeding |
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No.04TH8729)</title><addtitle>IITC</addtitle><description>A leading edge 90 nm, 300 mm wafer size interconnect technology featuring Cu, CDO low-k ILD and industry's most aggressive 220 nm minimum metal pitch is being ramped into production for high performance Pentium/spl reg/ microprocessors, the first in industry, to our knowledge. Key enabling features for yield and reliability improvement to resolve challenges from weak thermo-mechanical properties of low k ILD and tight metal pitches for a production worthy interconnect process are presented.</description><subject>Applied sciences</subject><subject>Capacitance</subject><subject>Degradation</subject><subject>Delamination</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Etching</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Logic</subject><subject>Manufacturing</subject><subject>Metallization</subject><subject>Microelectronic fabrication (materials and surfaces technology)</subject><subject>Microprocessors</subject><subject>Polymer films</subject><subject>Production</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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| identifier | ISBN: 9780780383081 |
| ispartof | Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729), 2004, p.205-207 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Applied sciences Capacitance Degradation Delamination Design. Technologies. Operation analysis. Testing Electronics Etching Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Logic Manufacturing Metallization Microelectronic fabrication (materials and surfaces technology) Microprocessors Polymer films Production Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices |
| title | A 90nm high volume manufacturing logic technology featuring Cu metallization and CDO low-k ILD interconnects on 300 mm wafers |
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