A 1000 FPS at 128/spl times/128 vision processor with 8-bit digitized I/O

This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of processing elements, arranged to operate in accordance with the principles of single instruction multiple data (SIMD) computing architectures. This chip, implemented in a 0.35-/spl mu/...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2004-07, Vol.39 (7), p.1044-1055
Hauptverfasser:	Cembrano, G.L., Rodriguez-Vazquez, A., Galan, R.C., Jimenez-Garrido, F., Espejo, S., Dominguez-Castro, R.
Format:	Artikel
Sprache:	eng
Schlagworte:	Application software CMOS process CMOS technology Computer aided instruction Computer architecture Digital circuits Gray-scale Image processing Lighting Linear approximation
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