High speed FPGA implementation of RSA encryption algorithm

In this paper, new structures that implement RSA cryptographic algorithm are presented. These structures are built using a modified Montgomery modular multiplier, where the operations of multiplication and modular reductions are carried out in parallel rather than interleaved as in the traditional M...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Nibouche, O., Nibouche, M., Bouridane, A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Broadcasting Computer architecture Computer science Electronic commerce Field programmable gate arrays Informatics Interleaved codes Public key cryptography Safety Security
Online-Zugang:	Volltext bestellen
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