Analysis and optimization of coplanar RLC lines for GSI global interconnection

Compact physical models are derived for the delay and crosstalk of on-chip coplanar transmission lines, which are used in state-of-the-art high-speed microprocessors. These lines are mainly used for long global interconnects that are relatively thick and wide and have prominent inductive effects. Th...

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Bibliographische Detailangaben

Veröffentlicht in:	IEEE transactions on electron devices 2004-06, Vol.51 (6), p.985-994
Hauptverfasser:	Naeemi, A., Davis, J.A., Meindl, J.D.
Format:	Artikel
Sprache:	eng
Schlagworte:	Crosstalk Delay Delay effects Design engineering High speed Integrated circuit interconnections Integrated circuit modeling Interconnection Microprocessors Optimization State of the art
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