Simulation and Design Analysis of (A1Ga)As/GaAs MODFET Integrated Circuits
A new (AlGa)As/GaAs MODFET integrated circuit simulator is described. Our simulator is a customized version of SPICE incorporating the extended charge control model for MODFET's and the velocity saturation model for ungated FET's used as the load devices. Comparison of our simulator result...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 1986-04, Vol.5 (2), p.284-292 |
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creator | Choong H. Hyun Shur, M.S. Cirillo, N.C. |
description | A new (AlGa)As/GaAs MODFET integrated circuit simulator is described. Our simulator is a customized version of SPICE incorporating the extended charge control model for MODFET's and the velocity saturation model for ungated FET's used as the load devices. Comparison of our simulator results with the measured data show good agreement for both dc and transient responses. We also propose a set of analytically derived design guidelines for MODFET inverter stages. Design parameters such as the optimum ratio of driver to load saturation currents, noise margins and switching delays can be readily related to the device process parameters. Our simulation results indicate that the inverter speed increases with increasing driver threshold voltages but there is an optimum threshold voltage, of approximately 0.4 V for our devices, which provide the highest noise margin. |
doi_str_mv | 10.1109/TCAD.1986.1270197 |
format | Article |
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Hyun ; Shur, M.S. ; Cirillo, N.C.</creator><creatorcontrib>Choong H. Hyun ; Shur, M.S. ; Cirillo, N.C.</creatorcontrib><description>A new (AlGa)As/GaAs MODFET integrated circuit simulator is described. Our simulator is a customized version of SPICE incorporating the extended charge control model for MODFET's and the velocity saturation model for ungated FET's used as the load devices. Comparison of our simulator results with the measured data show good agreement for both dc and transient responses. We also propose a set of analytically derived design guidelines for MODFET inverter stages. Design parameters such as the optimum ratio of driver to load saturation currents, noise margins and switching delays can be readily related to the device process parameters. Our simulation results indicate that the inverter speed increases with increasing driver threshold voltages but there is an optimum threshold voltage, of approximately 0.4 V for our devices, which provide the highest noise margin.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.1986.1270197</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Analytical models ; Applied sciences ; Circuit simulation ; Electronics ; Exact sciences and technology ; Gallium arsenide ; HEMTs ; Integrated circuit modeling ; Integrated circuits ; Inverters ; MODFET integrated circuits ; Semiconductor electronics. Microelectronics. Optoelectronics. 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Hyun</creatorcontrib><creatorcontrib>Shur, M.S.</creatorcontrib><creatorcontrib>Cirillo, N.C.</creatorcontrib><title>Simulation and Design Analysis of (A1Ga)As/GaAs MODFET Integrated Circuits</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>A new (AlGa)As/GaAs MODFET integrated circuit simulator is described. Our simulator is a customized version of SPICE incorporating the extended charge control model for MODFET's and the velocity saturation model for ungated FET's used as the load devices. Comparison of our simulator results with the measured data show good agreement for both dc and transient responses. We also propose a set of analytically derived design guidelines for MODFET inverter stages. Design parameters such as the optimum ratio of driver to load saturation currents, noise margins and switching delays can be readily related to the device process parameters. Our simulation results indicate that the inverter speed increases with increasing driver threshold voltages but there is an optimum threshold voltage, of approximately 0.4 V for our devices, which provide the highest noise margin.</description><subject>Analytical models</subject><subject>Applied sciences</subject><subject>Circuit simulation</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Gallium arsenide</subject><subject>HEMTs</subject><subject>Integrated circuit modeling</subject><subject>Integrated circuits</subject><subject>Inverters</subject><subject>MODFET integrated circuits</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Hyun</creatorcontrib><creatorcontrib>Shur, M.S.</creatorcontrib><creatorcontrib>Cirillo, N.C.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Choong H. Hyun</au><au>Shur, M.S.</au><au>Cirillo, N.C.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Simulation and Design Analysis of (A1Ga)As/GaAs MODFET Integrated Circuits</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>1986-04-01</date><risdate>1986</risdate><volume>5</volume><issue>2</issue><spage>284</spage><epage>292</epage><pages>284-292</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>A new (AlGa)As/GaAs MODFET integrated circuit simulator is described. Our simulator is a customized version of SPICE incorporating the extended charge control model for MODFET's and the velocity saturation model for ungated FET's used as the load devices. Comparison of our simulator results with the measured data show good agreement for both dc and transient responses. We also propose a set of analytically derived design guidelines for MODFET inverter stages. Design parameters such as the optimum ratio of driver to load saturation currents, noise margins and switching delays can be readily related to the device process parameters. Our simulation results indicate that the inverter speed increases with increasing driver threshold voltages but there is an optimum threshold voltage, of approximately 0.4 V for our devices, which provide the highest noise margin.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TCAD.1986.1270197</doi><tpages>9</tpages></addata></record> |
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identifier | ISSN: 0278-0070 |
ispartof | IEEE transactions on computer-aided design of integrated circuits and systems, 1986-04, Vol.5 (2), p.284-292 |
issn | 0278-0070 1937-4151 |
language | eng |
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source | IEEE Xplore |
subjects | Analytical models Applied sciences Circuit simulation Electronics Exact sciences and technology Gallium arsenide HEMTs Integrated circuit modeling Integrated circuits Inverters MODFET integrated circuits Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices SPICE Threshold voltage Velocity control |
title | Simulation and Design Analysis of (A1Ga)As/GaAs MODFET Integrated Circuits |
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