DATE panel chips of the future: soft, crunchy or hard?
Today's electronic products are composed of an increasingly diverse set of ICs, ranging from dedicated ASICs, domain-specific ASSPs, platform FPGAs, to general-purpose FPGA's. With increasing integration, a mix of different fabrics on a single SoC becomes possible, combining ASIC-style sta...
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| creator | Paulin, P.G. |
| description | Today's electronic products are composed of an increasingly diverse set of ICs, ranging from dedicated ASICs, domain-specific ASSPs, platform FPGAs, to general-purpose FPGA's. With increasing integration, a mix of different fabrics on a single SoC becomes possible, combining ASIC-style standard cells, embedded FPGAs, mask-programmable sea-of-gates, and programmable processors. The panelists will present their vision of the fabric which will dominate SoCs in 90 nm technologies and beyond, based on industrial trends and case studies. They will also outline the key CAD tool challenges for the chosen fabric. |
| doi_str_mv | 10.1109/DATE.2004.1268990 |
| format | Conference Proceeding |
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| identifier | ISSN: 1530-1591 |
| ispartof | Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004, Vol.2, p.844-849 Vol.2 |
| issn | 1530-1591 1558-1101 |
| language | eng |
| recordid | cdi_ieee_primary_1268990 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Application specific processors Costs Design automation Fabrics Field programmable gate arrays Manufacturing Productivity Reduced instruction set computing Space technology Time to market |
| title | DATE panel chips of the future: soft, crunchy or hard? |
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