Power supply noise coupling in a standard voltage reference circuit
Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency...
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| creator | Ozbas, M. Patru, D. Mukund, P.R. |
| description | Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency domain is developed and verified through simulations. A design solution for increasing high frequency PSN rejection is identified and evaluated. Finally, the effect of technology scaling on PSN is studied in two successive CMOS processes. |
| doi_str_mv | 10.1109/SOC.2003.1241534 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1241534</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1241534</ieee_id><sourcerecordid>1241534</sourcerecordid><originalsourceid>FETCH-LOGICAL-i217t-bbbd614e4c112ebb8a47062d0dc1516a8c8f06344d96100a433e0343e5b623a73</originalsourceid><addsrcrecordid>eNotj11LwzAUhgMiqHP3gjf5A53n5KRpdinFj8Fggno90uR0RGpbklbZv3fg3pvn5uGBV4g7hBUirB_ed_VKAdAKlcaS9IW4gcoCWbSKrsQy5y84TZfaKHst6rfhl5PM8zh2R9kPMbP0wzx2sT_I2Esn8-T64FKQP0M3uQPLxC0n7v1JjMnPcboVl63rMi_PXIjP56eP-rXY7l429eO2iAqrqWiaJhjUrD2i4qaxTldgVIDgsUTjrLctGNI6rA0COE3EQJq4bIwiV9FC3P93IzPvxxS_XTruzz_pD7eHSBw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Power supply noise coupling in a standard voltage reference circuit</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Ozbas, M. ; Patru, D. ; Mukund, P.R.</creator><creatorcontrib>Ozbas, M. ; Patru, D. ; Mukund, P.R.</creatorcontrib><description>Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency domain is developed and verified through simulations. A design solution for increasing high frequency PSN rejection is identified and evaluated. Finally, the effect of technology scaling on PSN is studied in two successive CMOS processes.</description><identifier>ISBN: 0780381823</identifier><identifier>ISBN: 9780780381827</identifier><identifier>DOI: 10.1109/SOC.2003.1241534</identifier><language>eng</language><publisher>IEEE</publisher><subject>Analog circuits ; Circuit noise ; Circuit simulation ; CMOS process ; CMOS technology ; Coupling circuits ; Frequency domain analysis ; Power supplies ; Semiconductor device modeling ; Voltage</subject><ispartof>IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings, 2003, p.319-322</ispartof><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1241534$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1241534$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ozbas, M.</creatorcontrib><creatorcontrib>Patru, D.</creatorcontrib><creatorcontrib>Mukund, P.R.</creatorcontrib><title>Power supply noise coupling in a standard voltage reference circuit</title><title>IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings</title><addtitle>SOC</addtitle><description>Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency domain is developed and verified through simulations. A design solution for increasing high frequency PSN rejection is identified and evaluated. Finally, the effect of technology scaling on PSN is studied in two successive CMOS processes.</description><subject>Analog circuits</subject><subject>Circuit noise</subject><subject>Circuit simulation</subject><subject>CMOS process</subject><subject>CMOS technology</subject><subject>Coupling circuits</subject><subject>Frequency domain analysis</subject><subject>Power supplies</subject><subject>Semiconductor device modeling</subject><subject>Voltage</subject><isbn>0780381823</isbn><isbn>9780780381827</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2003</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj11LwzAUhgMiqHP3gjf5A53n5KRpdinFj8Fggno90uR0RGpbklbZv3fg3pvn5uGBV4g7hBUirB_ed_VKAdAKlcaS9IW4gcoCWbSKrsQy5y84TZfaKHst6rfhl5PM8zh2R9kPMbP0wzx2sT_I2Esn8-T64FKQP0M3uQPLxC0n7v1JjMnPcboVl63rMi_PXIjP56eP-rXY7l429eO2iAqrqWiaJhjUrD2i4qaxTldgVIDgsUTjrLctGNI6rA0COE3EQJq4bIwiV9FC3P93IzPvxxS_XTruzz_pD7eHSBw</recordid><startdate>2003</startdate><enddate>2003</enddate><creator>Ozbas, M.</creator><creator>Patru, D.</creator><creator>Mukund, P.R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2003</creationdate><title>Power supply noise coupling in a standard voltage reference circuit</title><author>Ozbas, M. ; Patru, D. ; Mukund, P.R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i217t-bbbd614e4c112ebb8a47062d0dc1516a8c8f06344d96100a433e0343e5b623a73</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Analog circuits</topic><topic>Circuit noise</topic><topic>Circuit simulation</topic><topic>CMOS process</topic><topic>CMOS technology</topic><topic>Coupling circuits</topic><topic>Frequency domain analysis</topic><topic>Power supplies</topic><topic>Semiconductor device modeling</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Ozbas, M.</creatorcontrib><creatorcontrib>Patru, D.</creatorcontrib><creatorcontrib>Mukund, P.R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ozbas, M.</au><au>Patru, D.</au><au>Mukund, P.R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Power supply noise coupling in a standard voltage reference circuit</atitle><btitle>IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings</btitle><stitle>SOC</stitle><date>2003</date><risdate>2003</risdate><spage>319</spage><epage>322</epage><pages>319-322</pages><isbn>0780381823</isbn><isbn>9780780381827</isbn><abstract>Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency domain is developed and verified through simulations. A design solution for increasing high frequency PSN rejection is identified and evaluated. Finally, the effect of technology scaling on PSN is studied in two successive CMOS processes.</abstract><pub>IEEE</pub><doi>10.1109/SOC.2003.1241534</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record> |
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| language | eng |
| recordid | cdi_ieee_primary_1241534 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Analog circuits Circuit noise Circuit simulation CMOS process CMOS technology Coupling circuits Frequency domain analysis Power supplies Semiconductor device modeling Voltage |
| title | Power supply noise coupling in a standard voltage reference circuit |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T15%3A55%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Power%20supply%20noise%20coupling%20in%20a%20standard%20voltage%20reference%20circuit&rft.btitle=IEEE%20International%20%5BSystems-on-Chip%5D%20SOC%20Conference,%202003.%20Proceedings&rft.au=Ozbas,%20M.&rft.date=2003&rft.spage=319&rft.epage=322&rft.pages=319-322&rft.isbn=0780381823&rft.isbn_list=9780780381827&rft_id=info:doi/10.1109/SOC.2003.1241534&rft_dat=%3Cieee_6IE%3E1241534%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1241534&rfr_iscdi=true |