EPD time delay as WSix stack down gate etching in DPS+ chamber
Device makers want to make higher density chips as devices shrink, especially WSix polystack down is one of the key issues. However, EPD (end point detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next...
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| creator | Yong Deuk Ko Hui-Gon Chun Jing-Hyuk Lee Jae-Ho Byun Jae-Pil Jeon Yong-Hwa Song Tong-Yul Cho |
| description | Device makers want to make higher density chips as devices shrink, especially WSix polystack down is one of the key issues. However, EPD (end point detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next generation device. To investigate the EPD time delay, a test was done with patterned wafers. This experiment was carried out combined with OES (optical emission spectroscopy) and SEM (scanning electron microscopy). OES was used to find corrected wavelength in WSix stack down gate etching. SEM was used to confirm WSix gate profile and gate oxide damage. Through the experiment, a new wavelength (252 nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device. |
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However, EPD (end point detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next generation device. To investigate the EPD time delay, a test was done with patterned wafers. This experiment was carried out combined with OES (optical emission spectroscopy) and SEM (scanning electron microscopy). OES was used to find corrected wavelength in WSix stack down gate etching. SEM was used to confirm WSix gate profile and gate oxide damage. Through the experiment, a new wavelength (252 nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device.</description><identifier>ISBN: 8978686176</identifier><identifier>ISBN: 9788978686174</identifier><language>eng</language><publisher>IEEE</publisher><subject>Delay effects ; Electron emission ; Electron optics ; Etching ; Optical microscopy ; Plasma applications ; Scanning electron microscopy ; Spectroscopy ; Stimulated emission ; Testing</subject><ispartof>7th Korea-Russia International Symposium on Science and Technology, Proceedings KORUS 2003. (IEEE Cat. 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Through the experiment, a new wavelength (252 nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device.</description><subject>Delay effects</subject><subject>Electron emission</subject><subject>Electron optics</subject><subject>Etching</subject><subject>Optical microscopy</subject><subject>Plasma applications</subject><subject>Scanning electron microscopy</subject><subject>Spectroscopy</subject><subject>Stimulated emission</subject><subject>Testing</subject><isbn>8978686176</isbn><isbn>9788978686174</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2003</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzE1LAzEQgOGACGrtL_Ayd1nITOIkexGkrR9QsNCCx5LNTtpod5XNgvbfK9j38tzeM3Xla-fZMzq-UNNS3vVfpmby5lLdL1ZzGHMn0MohHCEUeFvnHyhjiB_Qfn73sAujgIxxn_sd5B7mq_UtxH3oGhmu1XkKhyLTkxO1eVxsZs_V8vXpZfawrHKtx4qi10zBW-s5YXPn0OpoW2kwoXaOnEmemDVpz9FgiC2jkdogm8S2ITNRN__bLCLbryF3YThukYisRfMLbVI-Cg</recordid><startdate>2003</startdate><enddate>2003</enddate><creator>Yong Deuk Ko</creator><creator>Hui-Gon Chun</creator><creator>Jing-Hyuk Lee</creator><creator>Jae-Ho Byun</creator><creator>Jae-Pil Jeon</creator><creator>Yong-Hwa Song</creator><creator>Tong-Yul Cho</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2003</creationdate><title>EPD time delay as WSix stack down gate etching in DPS+ chamber</title><author>Yong Deuk Ko ; Hui-Gon Chun ; Jing-Hyuk Lee ; Jae-Ho Byun ; Jae-Pil Jeon ; Yong-Hwa Song ; Tong-Yul Cho</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-2c8062a84486f1b57140c4deb1f1077273f826602086c31acd613e93163f64b23</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Delay effects</topic><topic>Electron emission</topic><topic>Electron optics</topic><topic>Etching</topic><topic>Optical microscopy</topic><topic>Plasma applications</topic><topic>Scanning electron microscopy</topic><topic>Spectroscopy</topic><topic>Stimulated emission</topic><topic>Testing</topic><toplevel>online_resources</toplevel><creatorcontrib>Yong Deuk Ko</creatorcontrib><creatorcontrib>Hui-Gon Chun</creatorcontrib><creatorcontrib>Jing-Hyuk Lee</creatorcontrib><creatorcontrib>Jae-Ho Byun</creatorcontrib><creatorcontrib>Jae-Pil Jeon</creatorcontrib><creatorcontrib>Yong-Hwa Song</creatorcontrib><creatorcontrib>Tong-Yul Cho</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yong Deuk Ko</au><au>Hui-Gon Chun</au><au>Jing-Hyuk Lee</au><au>Jae-Ho Byun</au><au>Jae-Pil Jeon</au><au>Yong-Hwa Song</au><au>Tong-Yul Cho</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>EPD time delay as WSix stack down gate etching in DPS+ chamber</atitle><btitle>7th Korea-Russia International Symposium on Science and Technology, Proceedings KORUS 2003. (IEEE Cat. No.03EX737)</btitle><stitle>KORUS</stitle><date>2003</date><risdate>2003</risdate><volume>1</volume><spage>212</spage><epage>216 vol.1</epage><pages>212-216 vol.1</pages><isbn>8978686176</isbn><isbn>9788978686174</isbn><abstract>Device makers want to make higher density chips as devices shrink, especially WSix polystack down is one of the key issues. However, EPD (end point detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next generation device. To investigate the EPD time delay, a test was done with patterned wafers. This experiment was carried out combined with OES (optical emission spectroscopy) and SEM (scanning electron microscopy). OES was used to find corrected wavelength in WSix stack down gate etching. SEM was used to confirm WSix gate profile and gate oxide damage. Through the experiment, a new wavelength (252 nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device.</abstract><pub>IEEE</pub></addata></record> |
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| identifier | ISBN: 8978686176 |
| ispartof | 7th Korea-Russia International Symposium on Science and Technology, Proceedings KORUS 2003. (IEEE Cat. No.03EX737), 2003, Vol.1, p.212-216 vol.1 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Delay effects Electron emission Electron optics Etching Optical microscopy Plasma applications Scanning electron microscopy Spectroscopy Stimulated emission Testing |
| title | EPD time delay as WSix stack down gate etching in DPS+ chamber |
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