A region-based compilation infrastructure
In this paper we develop a new region-based compilation framework driven by the considerations of performance opportunities and compilation resources. In addition, we allow some optimization-directed attributes communicated from one optimization phase to another on a region basis to guide subsequent...
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| creator | Yang Liu Zhaoqing Zhang Ruliang Qiao Dz-ching Ju, R. |
| description | In this paper we develop a new region-based compilation framework driven by the considerations of performance opportunities and compilation resources. In addition, we allow some optimization-directed attributes communicated from one optimization phase to another on a region basis to guide subsequent optimizations. This region-based framework has been implemented in the Open Research Compiler targeting Itanium/sup /spl reg// Processor Family (IPF). Experimental results from the SPEC2000Int programs show that this infrastructure provides an effective control on forming regions to meet the requirements of different optimizations. For example, the compilation time of instruction scheduling is significantly reduced by this region formation infrastructure while preserving or improving the overall performance. At the highest optimization level, the performance of one program has a 15.6% improvement by employing this region-based infrastructure. |
| doi_str_mv | 10.1109/INTERA.2003.1192358 |
| format | Conference Proceeding |
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In addition, we allow some optimization-directed attributes communicated from one optimization phase to another on a region basis to guide subsequent optimizations. This region-based framework has been implemented in the Open Research Compiler targeting Itanium/sup /spl reg// Processor Family (IPF). Experimental results from the SPEC2000Int programs show that this infrastructure provides an effective control on forming regions to meet the requirements of different optimizations. For example, the compilation time of instruction scheduling is significantly reduced by this region formation infrastructure while preserving or improving the overall performance. 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At the highest optimization level, the performance of one program has a 15.6% improvement by employing this region-based infrastructure.</description><subject>Computers</subject><subject>High performance computing</subject><subject>Microprocessors</subject><subject>Optimizing compilers</subject><subject>Partial response channels</subject><subject>Partitioning algorithms</subject><subject>Performance analysis</subject><subject>Program processors</subject><subject>Size control</subject><subject>Tail</subject><isbn>0769518893</isbn><isbn>9780769518893</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2003</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj81qAjEURgNSsLU-gZvZdjH2JjfJJMtBbCtIC0XXcidzp0T8IxkXvr0D9Ww-OIsPjhAzCXMpwb-vvjfL33quAHAQXqFxI_EClfVGOudxLKY572FAGzBePYu3ukj8F8-nsqHMbRHOx0s8UD-YIp66RLlP19BfE7-Kp44OmaePnYjtx3Kz-CrXP5-rRb0uo1LQl66yGgjRmjZUJMkoa4JnDRi0Qd9gkLKxxIG6wC0g-45QAlW6ddJCgxMx-_-NzLy7pHikdNs9avAOS3BAFQ</recordid><startdate>2003</startdate><enddate>2003</enddate><creator>Yang Liu</creator><creator>Zhaoqing Zhang</creator><creator>Ruliang Qiao</creator><creator>Dz-ching Ju, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2003</creationdate><title>A region-based compilation infrastructure</title><author>Yang Liu ; Zhaoqing Zhang ; Ruliang Qiao ; Dz-ching Ju, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i220t-87640a3365dc7a1a5265c9e403c4539b3c11b6aecafced03e9fa310a74d8160b3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Computers</topic><topic>High performance computing</topic><topic>Microprocessors</topic><topic>Optimizing compilers</topic><topic>Partial response channels</topic><topic>Partitioning algorithms</topic><topic>Performance analysis</topic><topic>Program processors</topic><topic>Size control</topic><topic>Tail</topic><toplevel>online_resources</toplevel><creatorcontrib>Yang Liu</creatorcontrib><creatorcontrib>Zhaoqing Zhang</creatorcontrib><creatorcontrib>Ruliang Qiao</creatorcontrib><creatorcontrib>Dz-ching Ju, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yang Liu</au><au>Zhaoqing Zhang</au><au>Ruliang Qiao</au><au>Dz-ching Ju, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A region-based compilation infrastructure</atitle><btitle>Seventh Workshop on Interaction Between Compilers and Computer Architectures, 2003. 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| identifier | ISBN: 0769518893 |
| ispartof | Seventh Workshop on Interaction Between Compilers and Computer Architectures, 2003. INTERACT-7 2003. Proceedings, 2003, p.75-84 |
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| language | eng |
| recordid | cdi_ieee_primary_1192358 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Computers High performance computing Microprocessors Optimizing compilers Partial response channels Partitioning algorithms Performance analysis Program processors Size control Tail |
| title | A region-based compilation infrastructure |
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