Effective error diagnosis for RTL designs in HDLs

We propose an effective approach to diagnose multiple design errors in HDL designs with only one erroneous test case. Error candidates will be greatly reduced while ensuring that true erroneous statements are included in. The probability of correctness for each potential erroneous statement will be...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Tai-Ying Jiang, Liu, C.-N.J., Jing-Yang Jou
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Boolean functions Circuit simulation Circuit synthesis Design engineering Electronic equipment testing Error correction Hardware design languages Process design State estimation Very large scale integration
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