Design and Performance of a DSI Terminal for Domestic Applications

The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The termina...

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Veröffentlicht in:I.R.E. transactions on communications systems 1981-03, Vol.29 (3), p.337-345
Hauptverfasser: Maruta, R., Tomozawa, A., Nishitani, T., Okada, T., Nakano, K., Araseki, T., Tajima, M.
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container_end_page 345
container_issue 3
container_start_page 337
container_title I.R.E. transactions on communications systems
container_volume 29
creator Maruta, R.
Tomozawa, A.
Nishitani, T.
Okada, T.
Nakano, K.
Araseki, T.
Tajima, M.
description The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.
doi_str_mv 10.1109/TCOM.1981.1094995
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fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_1094995</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1094995</ieee_id><sourcerecordid>23638362</sourcerecordid><originalsourceid>FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</originalsourceid><addsrcrecordid>eNpNkE1LAzEQhoMoWKs_QLzk5G3rpLObZI-19aNQqWA9h2w-JLJfJu3Bf--W7cHTMLzPOwwPIbcMZoxB-bBbbt9mrJRsNmx5WRZnZMKKQmYgC3FOJgAlZFwIeUmuUvoGgBwQJ-Rx5VL4aqluLX130Xex0a1xtPNU09XHmu5cbEKrazpEdNU1Lu2DoYu-r4PR-9C16ZpceF0nd3OaU_L5_LRbvmab7ct6udhkBjnsM-ReiNyKojK5MdJzZOg51xK4kIJpi4W3BtBXIEWlLYC1gDYHBlWl0eOU3I93-9j9HIY_VBOScXWtW9cdkpojR4l8PoBsBE3sUorOqz6GRsdfxUAdbamjLXW0pU62hs7d2AnOuX_8mP4BL3NlcA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>23638362</pqid></control><display><type>article</type><title>Design and Performance of a DSI Terminal for Domestic Applications</title><source>IEEE Electronic Library (IEL)</source><creator>Maruta, R. ; Tomozawa, A. ; Nishitani, T. ; Okada, T. ; Nakano, K. ; Araseki, T. ; Tajima, M.</creator><creatorcontrib>Maruta, R. ; Tomozawa, A. ; Nishitani, T. ; Okada, T. ; Nakano, K. ; Araseki, T. ; Tajima, M.</creatorcontrib><description>The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.</description><identifier>ISSN: 0090-6778</identifier><identifier>ISSN: 0096-2244</identifier><identifier>EISSN: 1558-0857</identifier><identifier>DOI: 10.1109/TCOM.1981.1094995</identifier><identifier>CODEN: IECMBT</identifier><language>eng</language><publisher>IEEE</publisher><subject>Bit rate ; Costs ; Digital signal processing ; Interpolation ; Satellite communication ; Signal processing ; Speech ; Statistics ; Time division multiple access ; Underwater cables</subject><ispartof>I.R.E. transactions on communications systems, 1981-03, Vol.29 (3), p.337-345</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</citedby><cites>FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1094995$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1094995$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Maruta, R.</creatorcontrib><creatorcontrib>Tomozawa, A.</creatorcontrib><creatorcontrib>Nishitani, T.</creatorcontrib><creatorcontrib>Okada, T.</creatorcontrib><creatorcontrib>Nakano, K.</creatorcontrib><creatorcontrib>Araseki, T.</creatorcontrib><creatorcontrib>Tajima, M.</creatorcontrib><title>Design and Performance of a DSI Terminal for Domestic Applications</title><title>I.R.E. transactions on communications systems</title><addtitle>TCOMM</addtitle><description>The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.</description><subject>Bit rate</subject><subject>Costs</subject><subject>Digital signal processing</subject><subject>Interpolation</subject><subject>Satellite communication</subject><subject>Signal processing</subject><subject>Speech</subject><subject>Statistics</subject><subject>Time division multiple access</subject><subject>Underwater cables</subject><issn>0090-6778</issn><issn>0096-2244</issn><issn>1558-0857</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1981</creationdate><recordtype>article</recordtype><recordid>eNpNkE1LAzEQhoMoWKs_QLzk5G3rpLObZI-19aNQqWA9h2w-JLJfJu3Bf--W7cHTMLzPOwwPIbcMZoxB-bBbbt9mrJRsNmx5WRZnZMKKQmYgC3FOJgAlZFwIeUmuUvoGgBwQJ-Rx5VL4aqluLX130Xex0a1xtPNU09XHmu5cbEKrazpEdNU1Lu2DoYu-r4PR-9C16ZpceF0nd3OaU_L5_LRbvmab7ct6udhkBjnsM-ReiNyKojK5MdJzZOg51xK4kIJpi4W3BtBXIEWlLYC1gDYHBlWl0eOU3I93-9j9HIY_VBOScXWtW9cdkpojR4l8PoBsBE3sUorOqz6GRsdfxUAdbamjLXW0pU62hs7d2AnOuX_8mP4BL3NlcA</recordid><startdate>198103</startdate><enddate>198103</enddate><creator>Maruta, R.</creator><creator>Tomozawa, A.</creator><creator>Nishitani, T.</creator><creator>Okada, T.</creator><creator>Nakano, K.</creator><creator>Araseki, T.</creator><creator>Tajima, M.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>198103</creationdate><title>Design and Performance of a DSI Terminal for Domestic Applications</title><author>Maruta, R. ; Tomozawa, A. ; Nishitani, T. ; Okada, T. ; Nakano, K. ; Araseki, T. ; Tajima, M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1981</creationdate><topic>Bit rate</topic><topic>Costs</topic><topic>Digital signal processing</topic><topic>Interpolation</topic><topic>Satellite communication</topic><topic>Signal processing</topic><topic>Speech</topic><topic>Statistics</topic><topic>Time division multiple access</topic><topic>Underwater cables</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Maruta, R.</creatorcontrib><creatorcontrib>Tomozawa, A.</creatorcontrib><creatorcontrib>Nishitani, T.</creatorcontrib><creatorcontrib>Okada, T.</creatorcontrib><creatorcontrib>Nakano, K.</creatorcontrib><creatorcontrib>Araseki, T.</creatorcontrib><creatorcontrib>Tajima, M.</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>I.R.E. transactions on communications systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Maruta, R.</au><au>Tomozawa, A.</au><au>Nishitani, T.</au><au>Okada, T.</au><au>Nakano, K.</au><au>Araseki, T.</au><au>Tajima, M.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Design and Performance of a DSI Terminal for Domestic Applications</atitle><jtitle>I.R.E. transactions on communications systems</jtitle><stitle>TCOMM</stitle><date>1981-03</date><risdate>1981</risdate><volume>29</volume><issue>3</issue><spage>337</spage><epage>345</epage><pages>337-345</pages><issn>0090-6778</issn><issn>0096-2244</issn><eissn>1558-0857</eissn><coden>IECMBT</coden><abstract>The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.</abstract><pub>IEEE</pub><doi>10.1109/TCOM.1981.1094995</doi><tpages>9</tpages></addata></record>
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0096-2244
1558-0857
language eng
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subjects Bit rate
Costs
Digital signal processing
Interpolation
Satellite communication
Signal processing
Speech
Statistics
Time division multiple access
Underwater cables
title Design and Performance of a DSI Terminal for Domestic Applications
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T07%3A39%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Design%20and%20Performance%20of%20a%20DSI%20Terminal%20for%20Domestic%20Applications&rft.jtitle=I.R.E.%20transactions%20on%20communications%20systems&rft.au=Maruta,%20R.&rft.date=1981-03&rft.volume=29&rft.issue=3&rft.spage=337&rft.epage=345&rft.pages=337-345&rft.issn=0090-6778&rft.eissn=1558-0857&rft.coden=IECMBT&rft_id=info:doi/10.1109/TCOM.1981.1094995&rft_dat=%3Cproquest_RIE%3E23638362%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=23638362&rft_id=info:pmid/&rft_ieee_id=1094995&rfr_iscdi=true