Design and Performance of a DSI Terminal for Domestic Applications
The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The termina...
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Veröffentlicht in: | I.R.E. transactions on communications systems 1981-03, Vol.29 (3), p.337-345 |
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container_title | I.R.E. transactions on communications systems |
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creator | Maruta, R. Tomozawa, A. Nishitani, T. Okada, T. Nakano, K. Araseki, T. Tajima, M. |
description | The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described. |
doi_str_mv | 10.1109/TCOM.1981.1094995 |
format | Article |
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The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.</description><identifier>ISSN: 0090-6778</identifier><identifier>ISSN: 0096-2244</identifier><identifier>EISSN: 1558-0857</identifier><identifier>DOI: 10.1109/TCOM.1981.1094995</identifier><identifier>CODEN: IECMBT</identifier><language>eng</language><publisher>IEEE</publisher><subject>Bit rate ; Costs ; Digital signal processing ; Interpolation ; Satellite communication ; Signal processing ; Speech ; Statistics ; Time division multiple access ; Underwater cables</subject><ispartof>I.R.E. transactions on communications systems, 1981-03, Vol.29 (3), p.337-345</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</citedby><cites>FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1094995$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1094995$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Maruta, R.</creatorcontrib><creatorcontrib>Tomozawa, A.</creatorcontrib><creatorcontrib>Nishitani, T.</creatorcontrib><creatorcontrib>Okada, T.</creatorcontrib><creatorcontrib>Nakano, K.</creatorcontrib><creatorcontrib>Araseki, T.</creatorcontrib><creatorcontrib>Tajima, M.</creatorcontrib><title>Design and Performance of a DSI Terminal for Domestic Applications</title><title>I.R.E. transactions on communications systems</title><addtitle>TCOMM</addtitle><description>The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.</description><subject>Bit rate</subject><subject>Costs</subject><subject>Digital signal processing</subject><subject>Interpolation</subject><subject>Satellite communication</subject><subject>Signal processing</subject><subject>Speech</subject><subject>Statistics</subject><subject>Time division multiple access</subject><subject>Underwater cables</subject><issn>0090-6778</issn><issn>0096-2244</issn><issn>1558-0857</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1981</creationdate><recordtype>article</recordtype><recordid>eNpNkE1LAzEQhoMoWKs_QLzk5G3rpLObZI-19aNQqWA9h2w-JLJfJu3Bf--W7cHTMLzPOwwPIbcMZoxB-bBbbt9mrJRsNmx5WRZnZMKKQmYgC3FOJgAlZFwIeUmuUvoGgBwQJ-Rx5VL4aqluLX130Xex0a1xtPNU09XHmu5cbEKrazpEdNU1Lu2DoYu-r4PR-9C16ZpceF0nd3OaU_L5_LRbvmab7ct6udhkBjnsM-ReiNyKojK5MdJzZOg51xK4kIJpi4W3BtBXIEWlLYC1gDYHBlWl0eOU3I93-9j9HIY_VBOScXWtW9cdkpojR4l8PoBsBE3sUorOqz6GRsdfxUAdbamjLXW0pU62hs7d2AnOuX_8mP4BL3NlcA</recordid><startdate>198103</startdate><enddate>198103</enddate><creator>Maruta, R.</creator><creator>Tomozawa, A.</creator><creator>Nishitani, T.</creator><creator>Okada, T.</creator><creator>Nakano, K.</creator><creator>Araseki, T.</creator><creator>Tajima, M.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>198103</creationdate><title>Design and Performance of a DSI Terminal for Domestic Applications</title><author>Maruta, R. ; Tomozawa, A. ; Nishitani, T. ; Okada, T. ; Nakano, K. ; Araseki, T. ; Tajima, M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c360t-36f774d75bc4cc8f6313f66a8067871ad35fdc03fb087bad00dd03d4010bba3f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1981</creationdate><topic>Bit rate</topic><topic>Costs</topic><topic>Digital signal processing</topic><topic>Interpolation</topic><topic>Satellite communication</topic><topic>Signal processing</topic><topic>Speech</topic><topic>Statistics</topic><topic>Time division multiple access</topic><topic>Underwater cables</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Maruta, R.</creatorcontrib><creatorcontrib>Tomozawa, A.</creatorcontrib><creatorcontrib>Nishitani, T.</creatorcontrib><creatorcontrib>Okada, T.</creatorcontrib><creatorcontrib>Nakano, K.</creatorcontrib><creatorcontrib>Araseki, T.</creatorcontrib><creatorcontrib>Tajima, M.</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>I.R.E. transactions on communications systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Maruta, R.</au><au>Tomozawa, A.</au><au>Nishitani, T.</au><au>Okada, T.</au><au>Nakano, K.</au><au>Araseki, T.</au><au>Tajima, M.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Design and Performance of a DSI Terminal for Domestic Applications</atitle><jtitle>I.R.E. transactions on communications systems</jtitle><stitle>TCOMM</stitle><date>1981-03</date><risdate>1981</risdate><volume>29</volume><issue>3</issue><spage>337</spage><epage>345</epage><pages>337-345</pages><issn>0090-6778</issn><issn>0096-2244</issn><eissn>1558-0857</eissn><coden>IECMBT</coden><abstract>The development of a microprocessor-controlled 96/48 DSI terminal is described. The terminal is intended for domestic use, and is designed so as to maximize compatibility with existing digital carrier systems, it merges four T1 signals into two T1 compatible bit streams for transmission. The terminal is given sufficient excess capacity to accommodate voiceband data, while retaining toll-grade transmission quality for speech. Implementation approaches and considerations in both calculated and measured system characteristics are described.</abstract><pub>IEEE</pub><doi>10.1109/TCOM.1981.1094995</doi><tpages>9</tpages></addata></record> |
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language | eng |
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subjects | Bit rate Costs Digital signal processing Interpolation Satellite communication Signal processing Speech Statistics Time division multiple access Underwater cables |
title | Design and Performance of a DSI Terminal for Domestic Applications |
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