Simulation Study on Single-Event Burnout Reliability of 900V 4H-SiC Quasi Vertical Double Diffused MOSFET
In this work, the single-event burnout (SEB) performance and reasons of the proposed 900V SiC quasi-vertical double diffusion MOSFET with deepened drain (T-QVDMOSFET) are analyzed from the spatial distribution of physical quantities such as power density, lattice temperature and total current densit...
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description | In this work, the single-event burnout (SEB) performance and reasons of the proposed 900V SiC quasi-vertical double diffusion MOSFET with deepened drain (T-QVDMOSFET) are analyzed from the spatial distribution of physical quantities such as power density, lattice temperature and total current density by 2-D numerical simulation, and a SEB-hardened structure (TB-QVDMOSFET) with buried oxygen layer (BOX) and heavily doped N-type current expansion layer (CSL) inside the device is proposed. Simulation results indicate that when heavy-ion with linear energy transfer (LET) of 0.5pC/ \mu m strikes the device, the primary cause of SEB in the SiC T-QVDMOSFET is the high transient current density and electric field at the trench gate corner. This phenomenon leads to increased power dissipation, resulting in excessive temperatures that ultimately cause thermal failure. The BOX and a heavily doped N-type CSL added in the SEB-hardened structure change the current flow path, and the transient current concentrated in the region is dispersed. This modification reduces the high current density and power dissipation at the trench corner, thereby significantly enhancing the device's resistance to SEB. Compared to the original device, the SEB threshold voltage is increased from 270V to 478V, marking a 77% improvement. |
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Simulation results indicate that when heavy-ion with linear energy transfer (LET) of 0.5pC/<inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m strikes the device, the primary cause of SEB in the SiC T-QVDMOSFET is the high transient current density and electric field at the trench gate corner. This phenomenon leads to increased power dissipation, resulting in excessive temperatures that ultimately cause thermal failure. The BOX and a heavily doped N-type CSL added in the SEB-hardened structure change the current flow path, and the transient current concentrated in the region is dispersed. This modification reduces the high current density and power dissipation at the trench corner, thereby significantly enhancing the device's resistance to SEB. Compared to the original device, the SEB threshold voltage is increased from 270V to 478V, marking a 77% improvement.</description><identifier>ISSN: 2169-3536</identifier><identifier>EISSN: 2169-3536</identifier><identifier>DOI: 10.1109/ACCESS.2024.3524391</identifier><identifier>CODEN: IAECCG</identifier><language>eng</language><publisher>Piscataway: IEEE</publisher><subject>Buried structures ; Current density ; Diffusion layers ; Dispersion hardening ; Electric fields ; Energy dissipation ; Heavy ions ; High-voltage techniques ; Linear energy transfer (LET) ; Logic gates ; MOSFET ; MOSFETs ; Power dissipation ; QVDMOSFET ; Rendering (computer graphics) ; SEB hardening ; SiC ; Silicon carbide ; Simulation ; single-event effect ; Spatial distribution ; Temperature ; Thermal conductivity ; Threshold voltage ; Transient current ; Transistors ; Two dimensional analysis ; Vertical distribution</subject><ispartof>IEEE access, 2025, Vol.13, p.5023-5031</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2025</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c2041-df51fda89b0ffceaba2f6a97a9f0378b7ecacca5b69a30dca15252d7e362b7963</cites><orcidid>0000-0002-5026-1431 ; 0000-0003-1127-5918 ; 0009-0008-5690-6254 ; 0000-0003-1436-3489 ; 0000-0001-5802-9488</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10818673$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,860,2096,4010,27610,27900,27901,27902,54908</link.rule.ids></links><search><creatorcontrib>Shi, Jin-Ke</creatorcontrib><creatorcontrib>Wang, Ying</creatorcontrib><creatorcontrib>Fei, Xin-Xing</creatorcontrib><creatorcontrib>Sun, Biao</creatorcontrib><creatorcontrib>Song, Yan-Xing</creatorcontrib><creatorcontrib>Liu, Yu-Qian</creatorcontrib><creatorcontrib>Zhang, Wei</creatorcontrib><title>Simulation Study on Single-Event Burnout Reliability of 900V 4H-SiC Quasi Vertical Double Diffused MOSFET</title><title>IEEE access</title><addtitle>Access</addtitle><description>In this work, the single-event burnout (SEB) performance and reasons of the proposed 900V SiC quasi-vertical double diffusion MOSFET with deepened drain (T-QVDMOSFET) are analyzed from the spatial distribution of physical quantities such as power density, lattice temperature and total current density by 2-D numerical simulation, and a SEB-hardened structure (TB-QVDMOSFET) with buried oxygen layer (BOX) and heavily doped N-type current expansion layer (CSL) inside the device is proposed. Simulation results indicate that when heavy-ion with linear energy transfer (LET) of 0.5pC/<inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m strikes the device, the primary cause of SEB in the SiC T-QVDMOSFET is the high transient current density and electric field at the trench gate corner. This phenomenon leads to increased power dissipation, resulting in excessive temperatures that ultimately cause thermal failure. The BOX and a heavily doped N-type CSL added in the SEB-hardened structure change the current flow path, and the transient current concentrated in the region is dispersed. This modification reduces the high current density and power dissipation at the trench corner, thereby significantly enhancing the device's resistance to SEB. Compared to the original device, the SEB threshold voltage is increased from 270V to 478V, marking a 77% improvement.</description><subject>Buried structures</subject><subject>Current density</subject><subject>Diffusion layers</subject><subject>Dispersion hardening</subject><subject>Electric fields</subject><subject>Energy dissipation</subject><subject>Heavy ions</subject><subject>High-voltage techniques</subject><subject>Linear energy transfer (LET)</subject><subject>Logic gates</subject><subject>MOSFET</subject><subject>MOSFETs</subject><subject>Power dissipation</subject><subject>QVDMOSFET</subject><subject>Rendering (computer graphics)</subject><subject>SEB hardening</subject><subject>SiC</subject><subject>Silicon carbide</subject><subject>Simulation</subject><subject>single-event effect</subject><subject>Spatial distribution</subject><subject>Temperature</subject><subject>Thermal conductivity</subject><subject>Threshold voltage</subject><subject>Transient current</subject><subject>Transistors</subject><subject>Two dimensional analysis</subject><subject>Vertical distribution</subject><issn>2169-3536</issn><issn>2169-3536</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2025</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><sourceid>DOA</sourceid><recordid>eNpNUdtKxDAULKKg6H6BPgR87ppr0zxqXS-gLFrd13CSJpKlbrQXwb83axcxLzkMM3OGM1l2SvCcEKwuLqtqUddziimfM0E5U2QvO6KkUDkTrNj_Nx9ms75f4_TKBAl5lIU6vI8tDCFuUD2MzTfaDmHz1rp88eU2A7oau00cB_Ts2gAmtGFIHI8UxivE7_I6VOhphD6gleuGYKFF13E0rUPXwfuxdw16XNY3i5eT7MBD27vZ7j_OXhNa3eUPy9v76vIhtxRzkjdeEN9AqQz23jowQH0BSoLymMnSSGfBWhCmUMBwY4EIKmgjHSuokapgx9n95NtEWOuPLrxD960jBP0LxO5NwzZo6zQRIG3JgEJjuOeqpETignLJGOGGqeR1Pnl9dPFzdP2g1zGdI8XXjIh0aMI4TSw2sWwX-75z_m8rwXpbkZ4q0tuK9K6ipDqbVME5909RkrJIAX4AR82LWg</recordid><startdate>2025</startdate><enddate>2025</enddate><creator>Shi, Jin-Ke</creator><creator>Wang, Ying</creator><creator>Fei, Xin-Xing</creator><creator>Sun, Biao</creator><creator>Song, Yan-Xing</creator><creator>Liu, Yu-Qian</creator><creator>Zhang, Wei</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>ESBDL</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>7SR</scope><scope>8BQ</scope><scope>8FD</scope><scope>JG9</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>DOA</scope><orcidid>https://orcid.org/0000-0002-5026-1431</orcidid><orcidid>https://orcid.org/0000-0003-1127-5918</orcidid><orcidid>https://orcid.org/0009-0008-5690-6254</orcidid><orcidid>https://orcid.org/0000-0003-1436-3489</orcidid><orcidid>https://orcid.org/0000-0001-5802-9488</orcidid></search><sort><creationdate>2025</creationdate><title>Simulation Study on Single-Event Burnout Reliability of 900V 4H-SiC Quasi Vertical Double Diffused MOSFET</title><author>Shi, Jin-Ke ; Wang, Ying ; Fei, Xin-Xing ; Sun, Biao ; Song, Yan-Xing ; Liu, Yu-Qian ; Zhang, Wei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2041-df51fda89b0ffceaba2f6a97a9f0378b7ecacca5b69a30dca15252d7e362b7963</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2025</creationdate><topic>Buried structures</topic><topic>Current density</topic><topic>Diffusion layers</topic><topic>Dispersion hardening</topic><topic>Electric fields</topic><topic>Energy dissipation</topic><topic>Heavy ions</topic><topic>High-voltage techniques</topic><topic>Linear energy transfer (LET)</topic><topic>Logic gates</topic><topic>MOSFET</topic><topic>MOSFETs</topic><topic>Power dissipation</topic><topic>QVDMOSFET</topic><topic>Rendering (computer graphics)</topic><topic>SEB hardening</topic><topic>SiC</topic><topic>Silicon carbide</topic><topic>Simulation</topic><topic>single-event effect</topic><topic>Spatial distribution</topic><topic>Temperature</topic><topic>Thermal conductivity</topic><topic>Threshold voltage</topic><topic>Transient current</topic><topic>Transistors</topic><topic>Two dimensional analysis</topic><topic>Vertical distribution</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Shi, Jin-Ke</creatorcontrib><creatorcontrib>Wang, Ying</creatorcontrib><creatorcontrib>Fei, Xin-Xing</creatorcontrib><creatorcontrib>Sun, Biao</creatorcontrib><creatorcontrib>Song, Yan-Xing</creatorcontrib><creatorcontrib>Liu, Yu-Qian</creatorcontrib><creatorcontrib>Zhang, Wei</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE Open Access Journals</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Engineered Materials Abstracts</collection><collection>METADEX</collection><collection>Technology Research Database</collection><collection>Materials Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>DOAJ Directory of Open Access Journals</collection><jtitle>IEEE access</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Shi, Jin-Ke</au><au>Wang, Ying</au><au>Fei, Xin-Xing</au><au>Sun, Biao</au><au>Song, Yan-Xing</au><au>Liu, Yu-Qian</au><au>Zhang, Wei</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Simulation Study on Single-Event Burnout Reliability of 900V 4H-SiC Quasi Vertical Double Diffused MOSFET</atitle><jtitle>IEEE access</jtitle><stitle>Access</stitle><date>2025</date><risdate>2025</risdate><volume>13</volume><spage>5023</spage><epage>5031</epage><pages>5023-5031</pages><issn>2169-3536</issn><eissn>2169-3536</eissn><coden>IAECCG</coden><abstract>In this work, the single-event burnout (SEB) performance and reasons of the proposed 900V SiC quasi-vertical double diffusion MOSFET with deepened drain (T-QVDMOSFET) are analyzed from the spatial distribution of physical quantities such as power density, lattice temperature and total current density by 2-D numerical simulation, and a SEB-hardened structure (TB-QVDMOSFET) with buried oxygen layer (BOX) and heavily doped N-type current expansion layer (CSL) inside the device is proposed. Simulation results indicate that when heavy-ion with linear energy transfer (LET) of 0.5pC/<inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m strikes the device, the primary cause of SEB in the SiC T-QVDMOSFET is the high transient current density and electric field at the trench gate corner. This phenomenon leads to increased power dissipation, resulting in excessive temperatures that ultimately cause thermal failure. The BOX and a heavily doped N-type CSL added in the SEB-hardened structure change the current flow path, and the transient current concentrated in the region is dispersed. This modification reduces the high current density and power dissipation at the trench corner, thereby significantly enhancing the device's resistance to SEB. Compared to the original device, the SEB threshold voltage is increased from 270V to 478V, marking a 77% improvement.</abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/ACCESS.2024.3524391</doi><tpages>9</tpages><orcidid>https://orcid.org/0000-0002-5026-1431</orcidid><orcidid>https://orcid.org/0000-0003-1127-5918</orcidid><orcidid>https://orcid.org/0009-0008-5690-6254</orcidid><orcidid>https://orcid.org/0000-0003-1436-3489</orcidid><orcidid>https://orcid.org/0000-0001-5802-9488</orcidid><oa>free_for_read</oa></addata></record> |
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subjects | Buried structures Current density Diffusion layers Dispersion hardening Electric fields Energy dissipation Heavy ions High-voltage techniques Linear energy transfer (LET) Logic gates MOSFET MOSFETs Power dissipation QVDMOSFET Rendering (computer graphics) SEB hardening SiC Silicon carbide Simulation single-event effect Spatial distribution Temperature Thermal conductivity Threshold voltage Transient current Transistors Two dimensional analysis Vertical distribution |
title | Simulation Study on Single-Event Burnout Reliability of 900V 4H-SiC Quasi Vertical Double Diffused MOSFET |
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