A Novel Parallel Feed-Forward Current Ripple Rejection (PFFCRR) Technique for High Load Current High PSRR nMOS LDOs

There is a significant demand in systems-on-chip (SoCs) for a high-power efficiency low-dropout regulator (LDO) that provides lower dropout voltage, higher load current, and low quiescent current. A high-power supply rejection ratio (PSRR) at the mid-to-high frequency band (0.1-10 MHz) is crucial fo...

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Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2024-11, p.1-11
Hauptverfasser: Lu, Yuhong, Yen, Ting-An, Nayak, Rakshit Dambe, Alevoor, Shashank, Talele, Bhushan, Patil, Spoorti, Kunz, Keith, Bakkaloglu, Bertan
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Sprache:eng
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