A 16 384-bit dynamic RAM

A 16-kbit dynamic RAM is described which is TTL compatible on all pins, and fits a standard 16-pin package. A single-transistor storage cell is used which occupies 455 /spl mu/m/SUP 2/. The device is fabricated in n-channel two-layer polysilicon gate technology using conventional design rules. The c...

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Veröffentlicht in:	IEEE journal of solid-state circuits 1976-10, Vol.11 (5), p.570-574
Hauptverfasser:	Ahlquist, C.N., Breivogel, J.R., Koo, J.T., McCollum, J.L., Oldham, W.G., Renninger, A.L.
Format:	Artikel
Sprache:	eng
Schlagworte:	Circuits Clocks Content addressable storage DRAM chips Packaging Pins Random access memory Read-write memory Silicon
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