Hardware-Optimized Architecture of On-board Registration for Remote-Sensing Images --Take SURF as an Example

On-board processing has become an inevitable choice for the development of remote sensing satellites. For the satellites with dual-line array asynchronous push-broom mode, image registration is crucial for pixel localization and alignment between dual-band strip data. However, due to the high comput...

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Veröffentlicht in:	IEEE journal of selected topics in applied earth observations and remote sensing 2024-01, Vol.17, p.1-20
Hauptverfasser:	Du, Xin, Yang, Cankun, Zhong, Ruofei, Li, Qingyang, Wang, Yuanhang, Huang, Zhaoming, Liu, Xianlin
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Arm Computer architecture Feature extraction Field Programmable Gate Array (FPGA) Field programmable gate arrays Hardware Hardware acceleration High-Level Synthesis (HLS) Image registration Image transmission Information processing Localization On-board processing Onboard Power consumption Power management Real time Registration Remote sensing Resource utilization Satellites Software algorithms Speed-up Robust Features (SURF) Strip
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