Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge

High-density and reliable multilevel-cell (MLC) resistive random access memory (RRAM) is expected to meet the ever-increasing demand for on-chip weight storages in the intelligent edge devices. However, due to the device variations, many write-and-verify (WAV) iterations are usually required to prog...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2024-02, Vol.32 (2), p.283-290
Hauptverfasser:	An, Junjie, Zhou, Zhidao, Wang, Linfang, Ye, Wang, Li, Weizeng, Gao, Hanghang, Li, Zhi, Tian, Jinghui, Wang, Yan, Hu, Hongyang, Yue, Jinshan, Fan, Lingyan, Long, Shibing, Liu, Qi, Dou, Chunmeng
Format:	Artikel
Sprache:	eng
Schlagworte:	Artificial intelligence Circuit synthesis Edge AI Encoding Multilevel cell (MLC) Nonvolatile memory nonvolatile memory (NVM) Power consumption programming schemes Random access memory Resistive RAM resistive random access memory (RRAM)
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