Low-Complexity Zipper-LDPC and Low-Latency Zipper-BCH Concatenated Codes
A novel concatenated forward error correction (FEC) scheme is proposed that consists of an inner zipper framework with low-density parity-check component codes and an outer zipper framework with BCH component codes. The proposed soft-decision inner codes have a universal, flexible, and implementatio...
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Veröffentlicht in: | Journal of lightwave technology 2023-12, Vol.41 (24), p.1-8 |
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creator | Barakatain, Masoud Hashemi, Yoones Karimi, Bashirreza Ebrahimzad, Hamid Li, Chuandong |
description | A novel concatenated forward error correction (FEC) scheme is proposed that consists of an inner zipper framework with low-density parity-check component codes and an outer zipper framework with BCH component codes. The proposed soft-decision inner codes have a universal, flexible, and implementation-friendly structure with low decoding complexity. The inner code is error-reducing, tasked with reducing the error rate on bits passed to the outer hard decision code below its threshold. The proposed outer codes have ultra-low overhead and are designed to have small decoding memory and latency. Computer simulations show that the proposed zipper-BCH codes can reduce the decoding latency and required memory by up to a factor of 30, compared to the conventional zipper codes, while maintaining a minimal performance loss. The proposed scheme is considered with higher-order modulation with both multi-level coding and bit-interleaved coded modulation. Simulations show that the concatenated FEC scheme can provide a 0.1 dB gain over the state-of-the-art FEC designs, making it a highly attractive FEC solution for high-throughput optical communication systems. |
doi_str_mv | 10.1109/JLT.2023.3297615 |
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The proposed soft-decision inner codes have a universal, flexible, and implementation-friendly structure with low decoding complexity. The inner code is error-reducing, tasked with reducing the error rate on bits passed to the outer hard decision code below its threshold. The proposed outer codes have ultra-low overhead and are designed to have small decoding memory and latency. Computer simulations show that the proposed zipper-BCH codes can reduce the decoding latency and required memory by up to a factor of 30, compared to the conventional zipper codes, while maintaining a minimal performance loss. The proposed scheme is considered with higher-order modulation with both multi-level coding and bit-interleaved coded modulation. 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The proposed soft-decision inner codes have a universal, flexible, and implementation-friendly structure with low decoding complexity. The inner code is error-reducing, tasked with reducing the error rate on bits passed to the outer hard decision code below its threshold. The proposed outer codes have ultra-low overhead and are designed to have small decoding memory and latency. Computer simulations show that the proposed zipper-BCH codes can reduce the decoding latency and required memory by up to a factor of 30, compared to the conventional zipper codes, while maintaining a minimal performance loss. The proposed scheme is considered with higher-order modulation with both multi-level coding and bit-interleaved coded modulation. Simulations show that the concatenated FEC scheme can provide a 0.1 dB gain over the state-of-the-art FEC designs, making it a highly attractive FEC solution for high-throughput optical communication systems.</description><subject>BCH codes</subject><subject>coded modulation</subject><subject>Codes</subject><subject>Communications systems</subject><subject>Complexity</subject><subject>Complexity theory</subject><subject>Concatenated codes</subject><subject>concatenated coding</subject><subject>Decoding</subject><subject>Error correcting codes</subject><subject>Error correction</subject><subject>Error reduction</subject><subject>fiber-optic communications</subject><subject>Forward error correction</subject><subject>Iterative decoding</subject><subject>low-complexity codes</subject><subject>low-density parity-check codes</subject><subject>Memory management</subject><subject>Modulation</subject><subject>Optical communication</subject><subject>zipper codes</subject><issn>0733-8724</issn><issn>1558-2213</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpNkL1PwzAQxS0EEqGwMzBEYnbxRxz7RgiFgCLBUBYWy7UdKVWbBDsV9L8nUSvEcDrdvffupB9C15TMKSVw91ot54wwPucMZE7FCUqoEAozRvkpSojkHCvJsnN0EeOaEJplSiaorLpvXHTbfuN_mmGffjZ97wOuHt-L1LQuneTKDL61f9pDUaZF19ppO5YbB-fjJTqrzSb6q2OfoY-nxbIocfX2_FLcV9gyYAN23OXWKCFq66xbCS7kCogUYEDWwKkD4YViQKjy3NYm59KBq2VmLVsRbvgM3R7u9qH72vk46HW3C-34UjMFkOUCBB1d5OCyoYsx-Fr3odmasNeU6ImXHnnpiZc-8hojN4dI473_Z6cKFOT8F-yVZWc</recordid><startdate>20231215</startdate><enddate>20231215</enddate><creator>Barakatain, Masoud</creator><creator>Hashemi, Yoones</creator><creator>Karimi, Bashirreza</creator><creator>Ebrahimzad, Hamid</creator><creator>Li, Chuandong</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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subjects | BCH codes coded modulation Codes Communications systems Complexity Complexity theory Concatenated codes concatenated coding Decoding Error correcting codes Error correction Error reduction fiber-optic communications Forward error correction Iterative decoding low-complexity codes low-density parity-check codes Memory management Modulation Optical communication zipper codes |
title | Low-Complexity Zipper-LDPC and Low-Latency Zipper-BCH Concatenated Codes |
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