An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption
Fully homomorphic encryption has become a key technique for solving the conflict between cloud services and privacy preservation. The most time-consuming step in homomorphic schemes is ring polynomial multiplication (RPM). Number theory transform (NTT) and Karatsuba algorithms are efficient to accel...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2024-01, Vol.71 (1), p.1-1 |
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| container_title | IEEE transactions on circuits and systems. II, Express briefs |
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| creator | Ren, Jingwei Du, Gaoming Li, Zhenmin Jia, Xianhu Liao, Qiuzhu Wang, Xiaolei Zhang, Duoli |
| description | Fully homomorphic encryption has become a key technique for solving the conflict between cloud services and privacy preservation. The most time-consuming step in homomorphic schemes is ring polynomial multiplication (RPM). Number theory transform (NTT) and Karatsuba algorithms are efficient to accelerate RPM, yet they are limited by the modulus operations and degrees of the polynomial. The systolic array is adopted for RPM processing recently. However, a modular reduction operation is required as post-processing which increases the overall delay. This paper has proposed a cyclic systolic array architecture without a dedicated reduction unit by re-routing the output of the systolic array for reusing, resulting in a 50% clock cycles saving of processing time. The corresponding FPGA implementation has a reduction of 72.9% and 33.8% when n=256 and n=1024 for equivalent area time product (eATP), respectively, therefore achieving an improved trade-off between performance and resource consumption. |
| doi_str_mv | 10.1109/TCSII.2023.3295614 |
| format | Article |
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The most time-consuming step in homomorphic schemes is ring polynomial multiplication (RPM). Number theory transform (NTT) and Karatsuba algorithms are efficient to accelerate RPM, yet they are limited by the modulus operations and degrees of the polynomial. The systolic array is adopted for RPM processing recently. However, a modular reduction operation is required as post-processing which increases the overall delay. This paper has proposed a cyclic systolic array architecture without a dedicated reduction unit by re-routing the output of the systolic array for reusing, resulting in a 50% clock cycles saving of processing time. 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II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ren, Jingwei</au><au>Du, Gaoming</au><au>Li, Zhenmin</au><au>Jia, Xianhu</au><au>Liao, Qiuzhu</au><au>Wang, Xiaolei</au><au>Zhang, Duoli</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2024-01-01</date><risdate>2024</risdate><volume>71</volume><issue>1</issue><spage>1</spage><epage>1</epage><pages>1-1</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ITCSFK</coden><abstract>Fully homomorphic encryption has become a key technique for solving the conflict between cloud services and privacy preservation. The most time-consuming step in homomorphic schemes is ring polynomial multiplication (RPM). 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| subjects | Algorithms Arithmetic Arrays ATP Cloud computing Computer architecture Convolution Delays FPGA Fully homomorphic encryption Homomorphic encryption negative wrapped convolution Number theory Polynomials Reduction Rings (mathematics) RLWE systolic array Systolic arrays Transforms |
| title | An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption |
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