Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode

Computationally intensive algorithms such as Deep Neural Networks (DNNs) are becoming killer applications for edge devices. Porting heavily data-parallel algorithms on resource-constrained and battery-powered devices while retaining the flexibility granted by instruction processor-based architecture...

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Veröffentlicht in:	IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2023-06, Vol.70 (6), p.1-14
Hauptverfasser:	Ottavi, Gianmarco, Garofalo, Angelo, Tagliavini, Giuseppe, Conti, Francesco, Mauro, Alfio Di, Benini, Luca, Rossi, Davide
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Arithmetic Artificial neural networks Clusters Computer architecture Electronic devices Energy efficiency Field programmable gate arrays Hardware Microprocessors MIMD mixed-precision Power consumption Power management Program processors QNN inference Quantization (signal) RISC RISC-V SIMD
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