BusMap: Application Mapping with Bus Routing for Coarse-Grained Reconfigurable Array
Coarse-grained reconfigurable array(CGRA) has gained popularity in compute-intensive applications because of its flexibility and energy-efficiency. When mapping the data flow graph(DFG) abstracted from the kernel loop of the application to CGRA, for data routing especially DFGs with high fan-out ope...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2023-08, Vol.70 (8), p.1-1 |
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| container_title | IEEE transactions on circuits and systems. II, Express briefs |
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| creator | Ni, Xiaobing Ge, Mengke Tao, Yongjin Sun, Wendi Duan, Feixiang Bai, Xuefei Xu, Qi Chen, Song Kang, Yi |
| description | Coarse-grained reconfigurable array(CGRA) has gained popularity in compute-intensive applications because of its flexibility and energy-efficiency. When mapping the data flow graph(DFG) abstracted from the kernel loop of the application to CGRA, for data routing especially DFGs with high fan-out operations, data transfer through the global register file (GRF) and insert routing/recomputation operations in the DFG are two ways that can serve as routing paths, but with increased power cost. For the data routing in these complex DFGs, we propose a new routing mode, bus routing, to exploit the buses as routing paths between PEs without GRF access and inserted operations. A mapping method incorporating bus routing, BusMap, is proposed to map the DFG onto CGRA by solving the maximum independent set(MIS) on a quadruple resource occupation conflict graph. The experiment results show BusMap can achieve fewer GRF access and inserted operations while having the same or even smaller initiation interval(II) compared to previous works. |
| doi_str_mv | 10.1109/TCSII.2023.3253686 |
| format | Article |
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When mapping the data flow graph(DFG) abstracted from the kernel loop of the application to CGRA, for data routing especially DFGs with high fan-out operations, data transfer through the global register file (GRF) and insert routing/recomputation operations in the DFG are two ways that can serve as routing paths, but with increased power cost. For the data routing in these complex DFGs, we propose a new routing mode, bus routing, to exploit the buses as routing paths between PEs without GRF access and inserted operations. A mapping method incorporating bus routing, BusMap, is proposed to map the DFG onto CGRA by solving the maximum independent set(MIS) on a quadruple resource occupation conflict graph. The experiment results show BusMap can achieve fewer GRF access and inserted operations while having the same or even smaller initiation interval(II) compared to previous works.</description><identifier>ISSN: 1549-7747</identifier><identifier>EISSN: 1558-3791</identifier><identifier>DOI: 10.1109/TCSII.2023.3253686</identifier><identifier>CODEN: ITCSFK</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Arrays ; bus routing mode ; BusMap ; CGRA ; Data transfer (computers) ; Fanout ; Flow mapping ; Germanium ; GRF access ; inserted operations ; Kernel ; Micromechanical devices ; Reconfiguration ; Registers ; Routing ; Scheduling</subject><ispartof>IEEE transactions on circuits and systems. II, Express briefs, 2023-08, Vol.70 (8), p.1-1</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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II, Express briefs</title><addtitle>TCSII</addtitle><description>Coarse-grained reconfigurable array(CGRA) has gained popularity in compute-intensive applications because of its flexibility and energy-efficiency. When mapping the data flow graph(DFG) abstracted from the kernel loop of the application to CGRA, for data routing especially DFGs with high fan-out operations, data transfer through the global register file (GRF) and insert routing/recomputation operations in the DFG are two ways that can serve as routing paths, but with increased power cost. For the data routing in these complex DFGs, we propose a new routing mode, bus routing, to exploit the buses as routing paths between PEs without GRF access and inserted operations. A mapping method incorporating bus routing, BusMap, is proposed to map the DFG onto CGRA by solving the maximum independent set(MIS) on a quadruple resource occupation conflict graph. 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II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ni, Xiaobing</au><au>Ge, Mengke</au><au>Tao, Yongjin</au><au>Sun, Wendi</au><au>Duan, Feixiang</au><au>Bai, Xuefei</au><au>Xu, Qi</au><au>Chen, Song</au><au>Kang, Yi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>BusMap: Application Mapping with Bus Routing for Coarse-Grained Reconfigurable Array</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2023-08-01</date><risdate>2023</risdate><volume>70</volume><issue>8</issue><spage>1</spage><epage>1</epage><pages>1-1</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ITCSFK</coden><abstract>Coarse-grained reconfigurable array(CGRA) has gained popularity in compute-intensive applications because of its flexibility and energy-efficiency. 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| subjects | Arrays bus routing mode BusMap CGRA Data transfer (computers) Fanout Flow mapping Germanium GRF access inserted operations Kernel Micromechanical devices Reconfiguration Registers Routing Scheduling |
| title | BusMap: Application Mapping with Bus Routing for Coarse-Grained Reconfigurable Array |
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