Physically-based extraction methodology for accurate MOSFET degradation assessment
This paper analyzes conventional parameter extraction methodologies applied to MOSFET devices subject to electrical stress and highlights the complexity to accurately get and separate both electrostatic and transport degradations. It is shown that an accurate Coulomb scattering assessment from the l...
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Veröffentlicht in: | Microelectronics and reliability 2015-08, Vol.55 (9-10), p.1417-1421 |
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container_title | Microelectronics and reliability |
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creator | Torrente, Giulio Coignus, Jean Renard, Sophie Vernhet, Alexandre Reimbold, Gilles Roy, David Ghibaudo, Gerard |
description | This paper analyzes conventional parameter extraction methodologies applied to MOSFET devices subject to electrical stress and highlights the complexity to accurately get and separate both electrostatic and transport degradations. It is shown that an accurate Coulomb scattering assessment from the linear Id-Vg characteristics is mandatory whenever the amount of interface charges/traps becomes significant. Thus, this paper proposes a novel technique able to extract the electrostatic drift and the field-dependent mobility directly from the experimental data without any a priori assumption for the transport.
Applied to MOSFETs experiencing Hot Carrier Stress, the proposed methodology provides deeper insights into the relationship between stress-induced defects location and their impact on electrostatic and transport degradations.
•Conventional extractions applied for degraded MOSFETs via HCI have been explored.•The complexity to accurately extract the aging through IdVg has been underlined.•We propose a novel method that extracts easily electrostatic and transport drifts.•Deeper insights into the electrical impact of the trap location have been addressed. |
doi_str_mv | 10.1016/j.microrel.2015.06.063 |
format | Article |
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Applied to MOSFETs experiencing Hot Carrier Stress, the proposed methodology provides deeper insights into the relationship between stress-induced defects location and their impact on electrostatic and transport degradations.
•Conventional extractions applied for degraded MOSFETs via HCI have been explored.•The complexity to accurately extract the aging through IdVg has been underlined.•We propose a novel method that extracts easily electrostatic and transport drifts.•Deeper insights into the electrical impact of the trap location have been addressed.</description><identifier>ISSN: 0026-2714</identifier><identifier>EISSN: 1872-941X</identifier><identifier>DOI: 10.1016/j.microrel.2015.06.063</identifier><language>eng</language><publisher>Elsevier Ltd</publisher><subject>Degradation ; Engineering Sciences ; HCI ; Interface traps ; Micro and nanotechnologies ; Microelectronics ; Parameter extractions ; Traps</subject><ispartof>Microelectronics and reliability, 2015-08, Vol.55 (9-10), p.1417-1421</ispartof><rights>2015 Elsevier Ltd</rights><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c416t-86c121a8229fb88e780c15cc07d0d599f0a92092925195e53a451b005ade2f703</citedby><cites>FETCH-LOGICAL-c416t-86c121a8229fb88e780c15cc07d0d599f0a92092925195e53a451b005ade2f703</cites><orcidid>0000-0002-1347-0250 ; 0000-0001-9901-0679</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://dx.doi.org/10.1016/j.microrel.2015.06.063$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>230,314,780,784,885,3550,27924,27925,45995</link.rule.ids><backlink>$$Uhttps://hal.science/hal-01947649$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Torrente, Giulio</creatorcontrib><creatorcontrib>Coignus, Jean</creatorcontrib><creatorcontrib>Renard, Sophie</creatorcontrib><creatorcontrib>Vernhet, Alexandre</creatorcontrib><creatorcontrib>Reimbold, Gilles</creatorcontrib><creatorcontrib>Roy, David</creatorcontrib><creatorcontrib>Ghibaudo, Gerard</creatorcontrib><title>Physically-based extraction methodology for accurate MOSFET degradation assessment</title><title>Microelectronics and reliability</title><description>This paper analyzes conventional parameter extraction methodologies applied to MOSFET devices subject to electrical stress and highlights the complexity to accurately get and separate both electrostatic and transport degradations. It is shown that an accurate Coulomb scattering assessment from the linear Id-Vg characteristics is mandatory whenever the amount of interface charges/traps becomes significant. Thus, this paper proposes a novel technique able to extract the electrostatic drift and the field-dependent mobility directly from the experimental data without any a priori assumption for the transport.
Applied to MOSFETs experiencing Hot Carrier Stress, the proposed methodology provides deeper insights into the relationship between stress-induced defects location and their impact on electrostatic and transport degradations.
•Conventional extractions applied for degraded MOSFETs via HCI have been explored.•The complexity to accurately extract the aging through IdVg has been underlined.•We propose a novel method that extracts easily electrostatic and transport drifts.•Deeper insights into the electrical impact of the trap location have been addressed.</description><subject>Degradation</subject><subject>Engineering Sciences</subject><subject>HCI</subject><subject>Interface traps</subject><subject>Micro and nanotechnologies</subject><subject>Microelectronics</subject><subject>Parameter extractions</subject><subject>Traps</subject><issn>0026-2714</issn><issn>1872-941X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNqFkE1LAzEQhoMoWKt_QfbqYdeZ7GdulqJWqCh-gLeQJrNtym4jyVrcf-_WqldhYGB43hfmYewcIUHA4nKdtFZ756lJOGCeQDFMesBGWJU8Fhm-HbIRAC9iXmJ2zE5CWANACYgj9vS46oPVqmn6eKECmYg-O690Z90maqlbOeMat-yj2vlIaf3hVUfR_cPzzfVLZGjplVHfrAqBQmhp052yo1o1gc5-9pi9DvB0Fs8fbu-mk3msMyy6uCo0clQV56JeVBWVFWjMtYbSgMmFqEEJDoILnqPIKU9VluMCIFeGeF1COmYX-96VauS7t63yvXTKytlkLnc3QJGVRSa2OLDFnh1EheCp_gsgyJ1FuZa_FuXOooRimHQIXu2DNHyyteRl0JY2moz1pDtpnP2v4guo9X6m</recordid><startdate>20150801</startdate><enddate>20150801</enddate><creator>Torrente, Giulio</creator><creator>Coignus, Jean</creator><creator>Renard, Sophie</creator><creator>Vernhet, Alexandre</creator><creator>Reimbold, Gilles</creator><creator>Roy, David</creator><creator>Ghibaudo, Gerard</creator><general>Elsevier Ltd</general><general>Elsevier</general><scope>AAYXX</scope><scope>CITATION</scope><scope>1XC</scope><orcidid>https://orcid.org/0000-0002-1347-0250</orcidid><orcidid>https://orcid.org/0000-0001-9901-0679</orcidid></search><sort><creationdate>20150801</creationdate><title>Physically-based extraction methodology for accurate MOSFET degradation assessment</title><author>Torrente, Giulio ; Coignus, Jean ; Renard, Sophie ; Vernhet, Alexandre ; Reimbold, Gilles ; Roy, David ; Ghibaudo, Gerard</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c416t-86c121a8229fb88e780c15cc07d0d599f0a92092925195e53a451b005ade2f703</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Degradation</topic><topic>Engineering Sciences</topic><topic>HCI</topic><topic>Interface traps</topic><topic>Micro and nanotechnologies</topic><topic>Microelectronics</topic><topic>Parameter extractions</topic><topic>Traps</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Torrente, Giulio</creatorcontrib><creatorcontrib>Coignus, Jean</creatorcontrib><creatorcontrib>Renard, Sophie</creatorcontrib><creatorcontrib>Vernhet, Alexandre</creatorcontrib><creatorcontrib>Reimbold, Gilles</creatorcontrib><creatorcontrib>Roy, David</creatorcontrib><creatorcontrib>Ghibaudo, Gerard</creatorcontrib><collection>CrossRef</collection><collection>Hyper Article en Ligne (HAL)</collection><jtitle>Microelectronics and reliability</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Torrente, Giulio</au><au>Coignus, Jean</au><au>Renard, Sophie</au><au>Vernhet, Alexandre</au><au>Reimbold, Gilles</au><au>Roy, David</au><au>Ghibaudo, Gerard</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Physically-based extraction methodology for accurate MOSFET degradation assessment</atitle><jtitle>Microelectronics and reliability</jtitle><date>2015-08-01</date><risdate>2015</risdate><volume>55</volume><issue>9-10</issue><spage>1417</spage><epage>1421</epage><pages>1417-1421</pages><issn>0026-2714</issn><eissn>1872-941X</eissn><abstract>This paper analyzes conventional parameter extraction methodologies applied to MOSFET devices subject to electrical stress and highlights the complexity to accurately get and separate both electrostatic and transport degradations. It is shown that an accurate Coulomb scattering assessment from the linear Id-Vg characteristics is mandatory whenever the amount of interface charges/traps becomes significant. Thus, this paper proposes a novel technique able to extract the electrostatic drift and the field-dependent mobility directly from the experimental data without any a priori assumption for the transport.
Applied to MOSFETs experiencing Hot Carrier Stress, the proposed methodology provides deeper insights into the relationship between stress-induced defects location and their impact on electrostatic and transport degradations.
•Conventional extractions applied for degraded MOSFETs via HCI have been explored.•The complexity to accurately extract the aging through IdVg has been underlined.•We propose a novel method that extracts easily electrostatic and transport drifts.•Deeper insights into the electrical impact of the trap location have been addressed.</abstract><pub>Elsevier Ltd</pub><doi>10.1016/j.microrel.2015.06.063</doi><tpages>5</tpages><orcidid>https://orcid.org/0000-0002-1347-0250</orcidid><orcidid>https://orcid.org/0000-0001-9901-0679</orcidid></addata></record> |
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subjects | Degradation Engineering Sciences HCI Interface traps Micro and nanotechnologies Microelectronics Parameter extractions Traps |
title | Physically-based extraction methodology for accurate MOSFET degradation assessment |
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