Phononic engineering of silicon using “dots on the fly” e-beam lithography and plasma etching

[Display omitted] •A fabrication process for nanoscale phononic crystals has been developed.•A “dots on the fly” technique is presented and its advantages are enlightened.•High resolution (40nm pitch) periodic phononic structures have been patterned.•CMOS compatible process for integration in TE converter fabrication process. Nowadays, the interest in reducing the lattice thermal conductivity (kL), without affecting the electrical one (ke), represents one of the main objectives for researchers in thermoelectricity. In semiconductors, lattice vibrations contribute about 95% to thermal conductivity. Because phonons and electrons transport operates over markedly different length scales, the power factor (S2σ), and consequently the ZT factor of merit, can be significantly improved through the reduction of kL without sacrifying the electrical conductivity (σ) and the Seebeck coefficient (S). In this work, we focus on the realization of an efficient e-beam lithography patterning methodology for phononic crystals to investigate thermal conductivity reduction in novel integrated thin film converters. The adopted “dots on the fly” lithography strategy, combined with an appropriate anisotropic plasma etching technique, permits the fabrication of phononic crystal patterns with minimal dimensions, easy layout and writing speeds 3 orders of magnitude larger of those obtained by conventional techniques.