A 35.6TOPS/W/mm$^2$ 3-Stage Pipelined Computational SRAM with Adjustable Form Factor for Highly Data-Centric Applications

In the context of highly data-centric applications, close reconciliation of computation and storage should significantly reduce the energy-consuming process of data movement. This paper proposes a Computational SRAM (CSRAM) combining In- and Near-Memory Computing (IMC/NMC) approaches to be used by a...

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Veröffentlicht in:	IEEE solid-state circuits letters 2020-07, Vol.3, p.286-289
Hauptverfasser:	Noel, J.-P, Pezzin, M., Gauchi, R., Christmann, J.-F, Kooli, M., Charles, Henri-Pierre, Ciampolini, L., Diallo, M., Lepin, F., Blampey, B., Vivet, P., Mitra, S., Giraud, B.
Format:	Artikel
Sprache:	eng
Schlagworte:	Computer Science Embedded Systems Engineering Sciences Micro and nanotechnologies Microelectronics
Online-Zugang:	Volltext
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