CACHE CONTROL TO PRESERVE REGISTER DATA

Techniques are disclosed relating to eviction control for cache lines that store register data. In some embodiments, memory hierarchy circuitry is configured to provide memory backing for register operand data in one or more cache circuits. Lock circuitry may control a first set of lock indicators f...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LI, David K, REDSHAW, Jonathan M, YEUNG, Winnie W, FOO, Yoong Chert, GOODMAN, Benjiman L, ZHANG, Zelin
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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