ULTRA-CLEAN VAN DER WAALS HETEROSTRUCTURES AND TECHNIQUES OF FABRICATION THEREOF
Disclosed are heterostructures that deploy one or more ultra-clean layers of van der Waals materials (VdW heterostructures). Further disclosed are techniques of fabricating VdW heterostructures that include patterning a conducting layer positioned on a substrate, separating, using a curved lifting s...
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| creator | YOUNG, Andrea COHEN, Liam |
| description | Disclosed are heterostructures that deploy one or more ultra-clean layers of van der Waals materials (VdW heterostructures). Further disclosed are techniques of fabricating VdW heterostructures that include patterning a conducting layer positioned on a substrate, separating, using a curved lifting surface, the patterned conducting layer from the substrate, and transferring the patterned conducting layer to a receiving stack of one or more layers while removing residual contaminants.
L'invention concerne des hétérostructures qui déploient une ou plusieurs couches ultra-propres de matériaux de van der Waals (hétérostructures VdW). L'invention concerne en outre des techniques de fabrication d'hétérostructures VdW qui comprennent la configuration d'une couche conductrice positionnée sur un substrat, la séparation, à l'aide d'une surface de levage incurvée, de la couche conductrice configurée à partir du substrat, et le transfert de la couche conductrice configurée sur un empilement de réception constitué d'une ou plusieurs couches tout en éliminant des contaminants résiduels. |
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L'invention concerne des hétérostructures qui déploient une ou plusieurs couches ultra-propres de matériaux de van der Waals (hétérostructures VdW). L'invention concerne en outre des techniques de fabrication d'hétérostructures VdW qui comprennent la configuration d'une couche conductrice positionnée sur un substrat, la séparation, à l'aide d'une surface de levage incurvée, de la couche conductrice configurée à partir du substrat, et le transfert de la couche conductrice configurée sur un empilement de réception constitué d'une ou plusieurs couches tout en éliminant des contaminants résiduels.</description><language>eng ; fre</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241114&DB=EPODOC&CC=WO&NR=2024158401A3$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25566,76549</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241114&DB=EPODOC&CC=WO&NR=2024158401A3$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YOUNG, Andrea</creatorcontrib><creatorcontrib>COHEN, Liam</creatorcontrib><title>ULTRA-CLEAN VAN DER WAALS HETEROSTRUCTURES AND TECHNIQUES OF FABRICATION THEREOF</title><description>Disclosed are heterostructures that deploy one or more ultra-clean layers of van der Waals materials (VdW heterostructures). Further disclosed are techniques of fabricating VdW heterostructures that include patterning a conducting layer positioned on a substrate, separating, using a curved lifting surface, the patterned conducting layer from the substrate, and transferring the patterned conducting layer to a receiving stack of one or more layers while removing residual contaminants.
L'invention concerne des hétérostructures qui déploient une ou plusieurs couches ultra-propres de matériaux de van der Waals (hétérostructures VdW). L'invention concerne en outre des techniques de fabrication d'hétérostructures VdW qui comprennent la configuration d'une couche conductrice positionnée sur un substrat, la séparation, à l'aide d'une surface de levage incurvée, de la couche conductrice configurée à partir du substrat, et le transfert de la couche conductrice configurée sur un empilement de réception constitué d'une ou plusieurs couches tout en éliminant des contaminants résiduels.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNissKwjAQAHvxIOo_LHgu9CX0uqYbUgiJbjb2WIrEk2ih_j_24Ad4GIaB2WaXaIUxV5bQwW2lI4YB0QYwJMQ-CEclkSkAug6ElHH9Na7pNWg8c69Qeu9ADDF5vc82j-m5pMPPu-yoSZTJ0_we0zJP9_RKn3HwVVE15altihLr-r_rCzm5MAw</recordid><startdate>20241114</startdate><enddate>20241114</enddate><creator>YOUNG, Andrea</creator><creator>COHEN, Liam</creator><scope>EVB</scope></search><sort><creationdate>20241114</creationdate><title>ULTRA-CLEAN VAN DER WAALS HETEROSTRUCTURES AND TECHNIQUES OF FABRICATION THEREOF</title><author>YOUNG, Andrea ; COHEN, Liam</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO2024158401A33</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YOUNG, Andrea</creatorcontrib><creatorcontrib>COHEN, Liam</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YOUNG, Andrea</au><au>COHEN, Liam</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ULTRA-CLEAN VAN DER WAALS HETEROSTRUCTURES AND TECHNIQUES OF FABRICATION THEREOF</title><date>2024-11-14</date><risdate>2024</risdate><abstract>Disclosed are heterostructures that deploy one or more ultra-clean layers of van der Waals materials (VdW heterostructures). Further disclosed are techniques of fabricating VdW heterostructures that include patterning a conducting layer positioned on a substrate, separating, using a curved lifting surface, the patterned conducting layer from the substrate, and transferring the patterned conducting layer to a receiving stack of one or more layers while removing residual contaminants.
L'invention concerne des hétérostructures qui déploient une ou plusieurs couches ultra-propres de matériaux de van der Waals (hétérostructures VdW). L'invention concerne en outre des techniques de fabrication d'hétérostructures VdW qui comprennent la configuration d'une couche conductrice positionnée sur un substrat, la séparation, à l'aide d'une surface de levage incurvée, de la couche conductrice configurée à partir du substrat, et le transfert de la couche conductrice configurée sur un empilement de réception constitué d'une ou plusieurs couches tout en éliminant des contaminants résiduels.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES |
| title | ULTRA-CLEAN VAN DER WAALS HETEROSTRUCTURES AND TECHNIQUES OF FABRICATION THEREOF |
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