SINGLE GATE THREE-DIMENSIONAL (3D) DYNAMIC RANDOM- ACCESS MEMORY (DRAM) DEVICES

A memory cell array includes a plurality of memory levels stacked in a first direction, each of the plurality of memory levels including an active region, a cell transistor having a single gate above the active region in the first direction, and a cell capacitor having a bottom electrode layer that...

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Hauptverfasser: KANG, Sung-Kwan, KANG, Chang Seok
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KANG, Chang Seok
description A memory cell array includes a plurality of memory levels stacked in a first direction, each of the plurality of memory levels including an active region, a cell transistor having a single gate above the active region in the first direction, and a cell capacitor having a bottom electrode layer that is electrically connected to the active region. Un réseau de cellules de mémoire comprend une pluralité de niveaux de mémoire empilés dans une première direction, chacun de la pluralité de niveaux de mémoire comprenant une région active, un transistor de cellule ayant une grille unique au-dessus de la région active dans la première direction, et un condensateur de cellule ayant une couche d'électrode inférieure qui est électriquement connectée à la région active.
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title SINGLE GATE THREE-DIMENSIONAL (3D) DYNAMIC RANDOM- ACCESS MEMORY (DRAM) DEVICES
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