HARDWARE FOR END-TO-END COMMUNICATION PROTECTION IN ASIC

An apparatus comprising communication logic and a memory. The communication logic may be configured to receive a data payload, validate the data payload, decode an instruction from the data payload, generate a bypass signal in response to the instruction and generate a remote signal in response to a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	GRAMENOS, James, ISLIM, Haitham, FITZPATRICK, John, WANTUCK, Ron
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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