SYSTEMS AND METHODS FOR MANAGING INTERRUPT PRIORITY LEVELS

A system includes non-transitory computer readable memory and a processor. The non-transitory computer readable memory stores a current processor interrupt priority level and a current disable interrupt control (DISICTL) interrupt priority level. The processor to update the current processor interru...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CATHERWOOD, Michael, SCHLUNDER, Howard, MICKEY, David
Format: Patent
Sprache:eng ; fre
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!