SILICON WAFER AND PREPARATION METHOD THEREFOR, AND SOLAR CELL
Disclosed in the present invention are a silicon wafer and a preparation method therefor, and a solar cell. The surface of the silicon wafer is of an uneven structure, and the surface of the uneven structure is provided with textured surface. By providing an uneven line mark surface on the surface o...
Gespeichert in:
| Hauptverfasser: | , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | chi ; eng ; fre |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | WANG, Xiaoxiao LIU, Shike ZHOU, Shuo XIE, Junxia LI, Weidong REN, Jinlong ZHAO, Zanliang SUN, Hui |
| description | Disclosed in the present invention are a silicon wafer and a preparation method therefor, and a solar cell. The surface of the silicon wafer is of an uneven structure, and the surface of the uneven structure is provided with textured surface. By providing an uneven line mark surface on the surface of the silicon wafer to increase the specific surface area of the surface of the silicon wafer and then providing a textured surface on the fluctuating line mark surface to greatly increase the number of quasi-pyramids on the surface of the silicon wafer, a short-circuit current of a solar cell is increased, and the light conversion efficiency of a solar cell is improved.
Sont divulgués dans la présente invention une tranche de silicium et son procédé de préparation, ainsi qu'une cellule solaire. La surface de la tranche de silicium est d'une structure irrégulière, et la surface de la structure irrégulière est pourvue d'une surface texturée. En fournissant une surface de marque de ligne irrégulière sur la surface de |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_WO2023097973A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>WO2023097973A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_WO2023097973A13</originalsourceid><addsrcrecordid>eNrjZLAN9vTxdPb3Uwh3dHMNUnD0c1EICHINcAxyDPEEivq6hnj4uyiEeLgGubr5B-mAFQT7-zgGKTi7-vjwMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL4cH8jAyNjA0tzS3NjR0Nj4lQBALb3KoY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SILICON WAFER AND PREPARATION METHOD THEREFOR, AND SOLAR CELL</title><source>esp@cenet</source><creator>WANG, Xiaoxiao ; LIU, Shike ; ZHOU, Shuo ; XIE, Junxia ; LI, Weidong ; REN, Jinlong ; ZHAO, Zanliang ; SUN, Hui</creator><creatorcontrib>WANG, Xiaoxiao ; LIU, Shike ; ZHOU, Shuo ; XIE, Junxia ; LI, Weidong ; REN, Jinlong ; ZHAO, Zanliang ; SUN, Hui</creatorcontrib><description>Disclosed in the present invention are a silicon wafer and a preparation method therefor, and a solar cell. The surface of the silicon wafer is of an uneven structure, and the surface of the uneven structure is provided with textured surface. By providing an uneven line mark surface on the surface of the silicon wafer to increase the specific surface area of the surface of the silicon wafer and then providing a textured surface on the fluctuating line mark surface to greatly increase the number of quasi-pyramids on the surface of the silicon wafer, a short-circuit current of a solar cell is increased, and the light conversion efficiency of a solar cell is improved.
Sont divulgués dans la présente invention une tranche de silicium et son procédé de préparation, ainsi qu'une cellule solaire. La surface de la tranche de silicium est d'une structure irrégulière, et la surface de la structure irrégulière est pourvue d'une surface texturée. En fournissant une surface de marque de ligne irrégulière sur la surface de</description><language>chi ; eng ; fre</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230608&DB=EPODOC&CC=WO&NR=2023097973A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230608&DB=EPODOC&CC=WO&NR=2023097973A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG, Xiaoxiao</creatorcontrib><creatorcontrib>LIU, Shike</creatorcontrib><creatorcontrib>ZHOU, Shuo</creatorcontrib><creatorcontrib>XIE, Junxia</creatorcontrib><creatorcontrib>LI, Weidong</creatorcontrib><creatorcontrib>REN, Jinlong</creatorcontrib><creatorcontrib>ZHAO, Zanliang</creatorcontrib><creatorcontrib>SUN, Hui</creatorcontrib><title>SILICON WAFER AND PREPARATION METHOD THEREFOR, AND SOLAR CELL</title><description>Disclosed in the present invention are a silicon wafer and a preparation method therefor, and a solar cell. The surface of the silicon wafer is of an uneven structure, and the surface of the uneven structure is provided with textured surface. By providing an uneven line mark surface on the surface of the silicon wafer to increase the specific surface area of the surface of the silicon wafer and then providing a textured surface on the fluctuating line mark surface to greatly increase the number of quasi-pyramids on the surface of the silicon wafer, a short-circuit current of a solar cell is increased, and the light conversion efficiency of a solar cell is improved.
Sont divulgués dans la présente invention une tranche de silicium et son procédé de préparation, ainsi qu'une cellule solaire. La surface de la tranche de silicium est d'une structure irrégulière, et la surface de la structure irrégulière est pourvue d'une surface texturée. En fournissant une surface de marque de ligne irrégulière sur la surface de</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAN9vTxdPb3Uwh3dHMNUnD0c1EICHINcAxyDPEEivq6hnj4uyiEeLgGubr5B-mAFQT7-zgGKTi7-vjwMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL4cH8jAyNjA0tzS3NjR0Nj4lQBALb3KoY</recordid><startdate>20230608</startdate><enddate>20230608</enddate><creator>WANG, Xiaoxiao</creator><creator>LIU, Shike</creator><creator>ZHOU, Shuo</creator><creator>XIE, Junxia</creator><creator>LI, Weidong</creator><creator>REN, Jinlong</creator><creator>ZHAO, Zanliang</creator><creator>SUN, Hui</creator><scope>EVB</scope></search><sort><creationdate>20230608</creationdate><title>SILICON WAFER AND PREPARATION METHOD THEREFOR, AND SOLAR CELL</title><author>WANG, Xiaoxiao ; LIU, Shike ; ZHOU, Shuo ; XIE, Junxia ; LI, Weidong ; REN, Jinlong ; ZHAO, Zanliang ; SUN, Hui</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO2023097973A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng ; fre</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WANG, Xiaoxiao</creatorcontrib><creatorcontrib>LIU, Shike</creatorcontrib><creatorcontrib>ZHOU, Shuo</creatorcontrib><creatorcontrib>XIE, Junxia</creatorcontrib><creatorcontrib>LI, Weidong</creatorcontrib><creatorcontrib>REN, Jinlong</creatorcontrib><creatorcontrib>ZHAO, Zanliang</creatorcontrib><creatorcontrib>SUN, Hui</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WANG, Xiaoxiao</au><au>LIU, Shike</au><au>ZHOU, Shuo</au><au>XIE, Junxia</au><au>LI, Weidong</au><au>REN, Jinlong</au><au>ZHAO, Zanliang</au><au>SUN, Hui</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SILICON WAFER AND PREPARATION METHOD THEREFOR, AND SOLAR CELL</title><date>2023-06-08</date><risdate>2023</risdate><abstract>Disclosed in the present invention are a silicon wafer and a preparation method therefor, and a solar cell. The surface of the silicon wafer is of an uneven structure, and the surface of the uneven structure is provided with textured surface. By providing an uneven line mark surface on the surface of the silicon wafer to increase the specific surface area of the surface of the silicon wafer and then providing a textured surface on the fluctuating line mark surface to greatly increase the number of quasi-pyramids on the surface of the silicon wafer, a short-circuit current of a solar cell is increased, and the light conversion efficiency of a solar cell is improved.
Sont divulgués dans la présente invention une tranche de silicium et son procédé de préparation, ainsi qu'une cellule solaire. La surface de la tranche de silicium est d'une structure irrégulière, et la surface de la structure irrégulière est pourvue d'une surface texturée. En fournissant une surface de marque de ligne irrégulière sur la surface de</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | chi ; eng ; fre |
| recordid | cdi_epo_espacenet_WO2023097973A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | SILICON WAFER AND PREPARATION METHOD THEREFOR, AND SOLAR CELL |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-14T14%3A59%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WANG,%20Xiaoxiao&rft.date=2023-06-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EWO2023097973A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |