SEMICONDUCTOR CHIP PACKAGE
Embodiments of the present disclosure relate to a semiconductor chip package. In the semiconductor chip package, a first pair of pads transmit differential signals and are electrically connected to a first pair of plating holes. A second pair of pads also transmit differential signals and are electr...
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| creator | YANG, Fangxu SHI, Lin SUN, Shihu |
| description | Embodiments of the present disclosure relate to a semiconductor chip package. In the semiconductor chip package, a first pair of pads transmit differential signals and are electrically connected to a first pair of plating holes. A second pair of pads also transmit differential signals and are electrically connected to a second pair of plating holes. The polarities of signals transmitted by adjacent pads among the two pairs of pads are the same, and the polarities of signals transmitted by adjacent plating holes among the two pairs of plating holes are opposite, and vice versa. In this way, differential crosstalk in a semiconductor chip package can be at least partially counteracted.
La présente divulgation concerne, selon certains modes de réalisation, un boîtier de puce à semi-conducteur. Dans le boîtier de puce à semi-conducteur, une première paire de plots émettent des signaux différentiels et sont électriquement connectés à une première paire de trous de placage. Une deuxième paire de plots transmettent é |
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La présente divulgation concerne, selon certains modes de réalisation, un boîtier de puce à semi-conducteur. Dans le boîtier de puce à semi-conducteur, une première paire de plots émettent des signaux différentiels et sont électriquement connectés à une première paire de trous de placage. Une deuxième paire de plots transmettent é</description><language>chi ; eng ; fre</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230519&DB=EPODOC&CC=WO&NR=2023082197A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230519&DB=EPODOC&CC=WO&NR=2023082197A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YANG, Fangxu</creatorcontrib><creatorcontrib>SHI, Lin</creatorcontrib><creatorcontrib>SUN, Shihu</creatorcontrib><title>SEMICONDUCTOR CHIP PACKAGE</title><description>Embodiments of the present disclosure relate to a semiconductor chip package. In the semiconductor chip package, a first pair of pads transmit differential signals and are electrically connected to a first pair of plating holes. A second pair of pads also transmit differential signals and are electrically connected to a second pair of plating holes. The polarities of signals transmitted by adjacent pads among the two pairs of pads are the same, and the polarities of signals transmitted by adjacent plating holes among the two pairs of plating holes are opposite, and vice versa. In this way, differential crosstalk in a semiconductor chip package can be at least partially counteracted.
La présente divulgation concerne, selon certains modes de réalisation, un boîtier de puce à semi-conducteur. Dans le boîtier de puce à semi-conducteur, une première paire de plots émettent des signaux différentiels et sont électriquement connectés à une première paire de trous de placage. Une deuxième paire de plots transmettent é</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAKdvX1dPb3cwl1DvEPUnD28AxQCHB09nZ0d-VhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHh_kYGRsYGFkaGluaOhsbEqQIAsPkhJA</recordid><startdate>20230519</startdate><enddate>20230519</enddate><creator>YANG, Fangxu</creator><creator>SHI, Lin</creator><creator>SUN, Shihu</creator><scope>EVB</scope></search><sort><creationdate>20230519</creationdate><title>SEMICONDUCTOR CHIP PACKAGE</title><author>YANG, Fangxu ; SHI, Lin ; SUN, Shihu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO2023082197A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng ; fre</language><creationdate>2023</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>YANG, Fangxu</creatorcontrib><creatorcontrib>SHI, Lin</creatorcontrib><creatorcontrib>SUN, Shihu</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YANG, Fangxu</au><au>SHI, Lin</au><au>SUN, Shihu</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR CHIP PACKAGE</title><date>2023-05-19</date><risdate>2023</risdate><abstract>Embodiments of the present disclosure relate to a semiconductor chip package. In the semiconductor chip package, a first pair of pads transmit differential signals and are electrically connected to a first pair of plating holes. A second pair of pads also transmit differential signals and are electrically connected to a second pair of plating holes. The polarities of signals transmitted by adjacent pads among the two pairs of pads are the same, and the polarities of signals transmitted by adjacent plating holes among the two pairs of plating holes are opposite, and vice versa. In this way, differential crosstalk in a semiconductor chip package can be at least partially counteracted.
La présente divulgation concerne, selon certains modes de réalisation, un boîtier de puce à semi-conducteur. Dans le boîtier de puce à semi-conducteur, une première paire de plots émettent des signaux différentiels et sont électriquement connectés à une première paire de trous de placage. Une deuxième paire de plots transmettent é</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | SEMICONDUCTOR CHIP PACKAGE |
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