GAN HEMT DEVICE AND PREPARATION METHOD
Disclosed in the present application are a GaN HEMT device and a preparation method. The device comprises a substrate, the upper surface of the substrate being sequentially provided with a GaN epitaxial layer and a gate dielectric layer from the bottom up. The device further comprises a gate, a sour...
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| creator | FU, Xingchang LIU, Xiangwu CUI, Yuxing ZHOU, Guo GAO, Yuan ZHANG, Lijiang SONG, Jiejing |
| description | Disclosed in the present application are a GaN HEMT device and a preparation method. The device comprises a substrate, the upper surface of the substrate being sequentially provided with a GaN epitaxial layer and a gate dielectric layer from the bottom up. The device further comprises a gate, a source and a drain which penetrate through the gate dielectric layer and are in contact with the GaN epitaxial layer. The gate dielectric layer comprises a first gate dielectric layer and a second gate dielectric layer which are different in property; the first gate dielectric layer is provided with a first gate slot, the second gate dielectric layer is provided with a second gate slot, and the first gate slot corresponds to the second gate slot in position. The gate comprises gate metal with which the first gate slot and the second gate slot are fully filled, and a gate cap disposed on the upper surface of the second gate dielectric layer; the source and the drain are located at two sides of the gate, respectively. Ac |
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The device comprises a substrate, the upper surface of the substrate being sequentially provided with a GaN epitaxial layer and a gate dielectric layer from the bottom up. The device further comprises a gate, a source and a drain which penetrate through the gate dielectric layer and are in contact with the GaN epitaxial layer. The gate dielectric layer comprises a first gate dielectric layer and a second gate dielectric layer which are different in property; the first gate dielectric layer is provided with a first gate slot, the second gate dielectric layer is provided with a second gate slot, and the first gate slot corresponds to the second gate slot in position. The gate comprises gate metal with which the first gate slot and the second gate slot are fully filled, and a gate cap disposed on the upper surface of the second gate dielectric layer; the source and the drain are located at two sides of the gate, respectively. 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The device comprises a substrate, the upper surface of the substrate being sequentially provided with a GaN epitaxial layer and a gate dielectric layer from the bottom up. The device further comprises a gate, a source and a drain which penetrate through the gate dielectric layer and are in contact with the GaN epitaxial layer. The gate dielectric layer comprises a first gate dielectric layer and a second gate dielectric layer which are different in property; the first gate dielectric layer is provided with a first gate slot, the second gate dielectric layer is provided with a second gate slot, and the first gate slot corresponds to the second gate slot in position. The gate comprises gate metal with which the first gate slot and the second gate slot are fully filled, and a gate cap disposed on the upper surface of the second gate dielectric layer; the source and the drain are located at two sides of the gate, respectively. Ac</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBzd_RT8HD1DVFwcQ3zdHZVcPRzUQgIcg1wDHIM8fT3U_B1DfHwd-FhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHh_kYGhpaG5gYGRkaOhsbEqQIAKUIkGg</recordid><startdate>20190912</startdate><enddate>20190912</enddate><creator>FU, Xingchang</creator><creator>LIU, Xiangwu</creator><creator>CUI, Yuxing</creator><creator>ZHOU, Guo</creator><creator>GAO, Yuan</creator><creator>ZHANG, Lijiang</creator><creator>SONG, Jiejing</creator><scope>EVB</scope></search><sort><creationdate>20190912</creationdate><title>GAN HEMT DEVICE AND PREPARATION METHOD</title><author>FU, Xingchang ; LIU, Xiangwu ; CUI, Yuxing ; ZHOU, Guo ; GAO, Yuan ; ZHANG, Lijiang ; SONG, Jiejing</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO2019170022A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng ; fre</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FU, Xingchang</creatorcontrib><creatorcontrib>LIU, Xiangwu</creatorcontrib><creatorcontrib>CUI, Yuxing</creatorcontrib><creatorcontrib>ZHOU, Guo</creatorcontrib><creatorcontrib>GAO, Yuan</creatorcontrib><creatorcontrib>ZHANG, Lijiang</creatorcontrib><creatorcontrib>SONG, Jiejing</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FU, Xingchang</au><au>LIU, Xiangwu</au><au>CUI, Yuxing</au><au>ZHOU, Guo</au><au>GAO, Yuan</au><au>ZHANG, Lijiang</au><au>SONG, Jiejing</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>GAN HEMT DEVICE AND PREPARATION METHOD</title><date>2019-09-12</date><risdate>2019</risdate><abstract>Disclosed in the present application are a GaN HEMT device and a preparation method. The device comprises a substrate, the upper surface of the substrate being sequentially provided with a GaN epitaxial layer and a gate dielectric layer from the bottom up. The device further comprises a gate, a source and a drain which penetrate through the gate dielectric layer and are in contact with the GaN epitaxial layer. The gate dielectric layer comprises a first gate dielectric layer and a second gate dielectric layer which are different in property; the first gate dielectric layer is provided with a first gate slot, the second gate dielectric layer is provided with a second gate slot, and the first gate slot corresponds to the second gate slot in position. The gate comprises gate metal with which the first gate slot and the second gate slot are fully filled, and a gate cap disposed on the upper surface of the second gate dielectric layer; the source and the drain are located at two sides of the gate, respectively. Ac</abstract><oa>free_for_read</oa></addata></record> |
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| title | GAN HEMT DEVICE AND PREPARATION METHOD |
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