EFFICIENT PCMS REFRESH MECHANISM BACKGROUND

An apparatus is described having invert determination logic circuitry to determine if a read data path that transports data read from a PCMS memory device is to be inverted or not inverted as a function of whether information represented by the data was last written in an inverted or non inverted lo...

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1. Verfasser: FABER, ROBERT W
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description An apparatus is described having invert determination logic circuitry to determine if a read data path that transports data read from a PCMS memory device is to be inverted or not inverted as a function of whether information represented by the data was last written in an inverted or non inverted logical state to the PCMS memory device during a refresh of said PCMS memory device. L'invention concerne un appareil ayant des circuits logiques de détermination inverse pour déterminer si un chemin de données lu qui transporte des données lues d'un dispositif mémoire PCMS doit être inversé ou non inversé selon que l'information représentée par les données avait été écrite en dernier dans un état logique inversé ou non inversé dans le dispositif mémoire PCMS pendant un rafraîchissement dudit dispositif mémoire PCMS.
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L'invention concerne un appareil ayant des circuits logiques de détermination inverse pour déterminer si un chemin de données lu qui transporte des données lues d'un dispositif mémoire PCMS doit être inversé ou non inversé selon que l'information représentée par les données avait été écrite en dernier dans un état logique inversé ou non inversé dans le dispositif mémoire PCMS pendant un rafraîchissement dudit dispositif mémoire PCMS.</description><language>eng ; fre</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130627&amp;DB=EPODOC&amp;CC=WO&amp;NR=2013095530A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130627&amp;DB=EPODOC&amp;CC=WO&amp;NR=2013095530A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FABER, ROBERT W</creatorcontrib><title>EFFICIENT PCMS REFRESH MECHANISM BACKGROUND</title><description>An apparatus is described having invert determination logic circuitry to determine if a read data path that transports data read from a PCMS memory device is to be inverted or not inverted as a function of whether information represented by the data was last written in an inverted or non inverted logical state to the PCMS memory device during a refresh of said PCMS memory device. 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language eng ; fre
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
title EFFICIENT PCMS REFRESH MECHANISM BACKGROUND
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