3D INTERCONNECT STRUCTURE COMPRISING FINE PITCH SINGLE DAMASCENE BACKSIDE METAL REDISTRIBUTION LINES COMBINED WITH THROUGH-SILICON VIAS
A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through- silicon vias (TSVs) and using a single damascene type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned...
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| creator | MA, HANG-SHING LEE, KEVIN J BOHR, MARK T SATTIRAJU, SESHU V KOTHARI, HITEN YEOH, ANDREW W PELTO, CHRISTOPHER M |
| description | A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through- silicon vias (TSVs) and using a single damascene type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and polish stop layer during the process flow.
La présente invention se rapporte à une structure d'interconnexion en 3D et à un procédé de fabrication, des couches de redistribution métalliques (RDL) étant intégrées dans des trous d'interconnexion traversant le silicium (TSV) utilisant un procédé de type damascène double. Une couche de passivation au nitrure de silicium ou au carbure de silicium peut être agencée entre la face arrière de la tranche de dispositif amincie et les couches RDL afin d'offrir une couche barrière hermétique et d'arrêt de polissage pendant le déroulement du procédé. |
| format | Patent |
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La présente invention se rapporte à une structure d'interconnexion en 3D et à un procédé de fabrication, des couches de redistribution métalliques (RDL) étant intégrées dans des trous d'interconnexion traversant le silicium (TSV) utilisant un procédé de type damascène double. Une couche de passivation au nitrure de silicium ou au carbure de silicium peut être agencée entre la face arrière de la tranche de dispositif amincie et les couches RDL afin d'offrir une couche barrière hermétique et d'arrêt de polissage pendant le déroulement du procédé.</description><language>eng ; fre</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130502&DB=EPODOC&CC=WO&NR=2013062593A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130502&DB=EPODOC&CC=WO&NR=2013062593A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MA, HANG-SHING</creatorcontrib><creatorcontrib>LEE, KEVIN J</creatorcontrib><creatorcontrib>BOHR, MARK T</creatorcontrib><creatorcontrib>SATTIRAJU, SESHU V</creatorcontrib><creatorcontrib>KOTHARI, HITEN</creatorcontrib><creatorcontrib>YEOH, ANDREW W</creatorcontrib><creatorcontrib>PELTO, CHRISTOPHER M</creatorcontrib><title>3D INTERCONNECT STRUCTURE COMPRISING FINE PITCH SINGLE DAMASCENE BACKSIDE METAL REDISTRIBUTION LINES COMBINED WITH THROUGH-SILICON VIAS</title><description>A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through- silicon vias (TSVs) and using a single damascene type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and polish stop layer during the process flow.
La présente invention se rapporte à une structure d'interconnexion en 3D et à un procédé de fabrication, des couches de redistribution métalliques (RDL) étant intégrées dans des trous d'interconnexion traversant le silicium (TSV) utilisant un procédé de type damascène double. Une couche de passivation au nitrure de silicium ou au carbure de silicium peut être agencée entre la face arrière de la tranche de dispositif amincie et les couches RDL afin d'offrir une couche barrière hermétique et d'arrêt de polissage pendant le déroulement du procédé.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNTcsKgkAUddMiqn-40FowpaDlOHPVSzojM9dcisS0ihLsH_rtRugDWp0H57GOPpkC0oxWGq1RMji2neTOIkjTtJYc6RIK0ggtsaxg0TWCEo1wEoOdC3lxpBAaZFGDRUVhg_KOyWioQ9MtU3kgCnriCriypiur2FFN4RauJNw2Wt3Hx-x3P9xE-wLDX-yn1-Dnabz5p38PvUmTQ5ac0uM5E4fsv9QXQBA_Ug</recordid><startdate>20130502</startdate><enddate>20130502</enddate><creator>MA, HANG-SHING</creator><creator>LEE, KEVIN J</creator><creator>BOHR, MARK T</creator><creator>SATTIRAJU, SESHU V</creator><creator>KOTHARI, HITEN</creator><creator>YEOH, ANDREW W</creator><creator>PELTO, CHRISTOPHER M</creator><scope>EVB</scope></search><sort><creationdate>20130502</creationdate><title>3D INTERCONNECT STRUCTURE COMPRISING FINE PITCH SINGLE DAMASCENE BACKSIDE METAL REDISTRIBUTION LINES COMBINED WITH THROUGH-SILICON VIAS</title><author>MA, HANG-SHING ; LEE, KEVIN J ; BOHR, MARK T ; SATTIRAJU, SESHU V ; KOTHARI, HITEN ; YEOH, ANDREW W ; PELTO, CHRISTOPHER M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO2013062593A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MA, HANG-SHING</creatorcontrib><creatorcontrib>LEE, KEVIN J</creatorcontrib><creatorcontrib>BOHR, MARK T</creatorcontrib><creatorcontrib>SATTIRAJU, SESHU V</creatorcontrib><creatorcontrib>KOTHARI, HITEN</creatorcontrib><creatorcontrib>YEOH, ANDREW W</creatorcontrib><creatorcontrib>PELTO, CHRISTOPHER M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MA, HANG-SHING</au><au>LEE, KEVIN J</au><au>BOHR, MARK T</au><au>SATTIRAJU, SESHU V</au><au>KOTHARI, HITEN</au><au>YEOH, ANDREW W</au><au>PELTO, CHRISTOPHER M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>3D INTERCONNECT STRUCTURE COMPRISING FINE PITCH SINGLE DAMASCENE BACKSIDE METAL REDISTRIBUTION LINES COMBINED WITH THROUGH-SILICON VIAS</title><date>2013-05-02</date><risdate>2013</risdate><abstract>A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through- silicon vias (TSVs) and using a single damascene type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and polish stop layer during the process flow.
La présente invention se rapporte à une structure d'interconnexion en 3D et à un procédé de fabrication, des couches de redistribution métalliques (RDL) étant intégrées dans des trous d'interconnexion traversant le silicium (TSV) utilisant un procédé de type damascène double. Une couche de passivation au nitrure de silicium ou au carbure de silicium peut être agencée entre la face arrière de la tranche de dispositif amincie et les couches RDL afin d'offrir une couche barrière hermétique et d'arrêt de polissage pendant le déroulement du procédé.</abstract><oa>free_for_read</oa></addata></record> |
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| title | 3D INTERCONNECT STRUCTURE COMPRISING FINE PITCH SINGLE DAMASCENE BACKSIDE METAL REDISTRIBUTION LINES COMBINED WITH THROUGH-SILICON VIAS |
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