PROCESSOR SYSTEM WITH PREDICATE REGISTER, COMPUTER SYSTEM, METHOD FOR MANAGING PREDICATES AND COMPUTER PROGRAM PRODUCT

The invention pertains to a processor system (10) comprising a processing unit (12) with a predetermined instruction set and at least one predicate register (14), the predicate register (14) comprising a number N of predicate data locations (P1, P2,..., Pn) being arranged in a predicate data structure, each predicate data location (P1, P2,, Pn) being adapted to store predicate data. It further comprises at least one general purpose register (16), the general purpose register (16) comprising additional predicate data locations, the additional predicate data locations being arranged in a number M-1 of additional predicate data containers, wherein a data structure of each additional predicate data container corresponds to the predicate data structure, wherein each additional predicate data location is adapted to store additional predicate data and a data pathway (18) for transmitting data between the at least one predicate register (14) and the general purpose register (16), wherein at least one predicate storage location (P1, P2,, Pn) is connected or connectable via the data pathway (18) to at least one corresponding additional predicate data location. The processor system (10) is adapted to carry out a predicate swap instruction of the instruction set to swap, via the data pathway (18), predicate data in a first predicate data location (P1, P2,, Pn) of the predicate register (14) with data in a corresponding additional predicate data location of a first additional predicate data container and to swap, via the data pathway (18), predicate data (P1, P2,, Pn) in a second predicate storage location of the predicate register (14) with data in a corresponding additional predicate data location in a second additional predicate data container. The invention also pertains to a corresponding computer system, a method for managing predicates and a corresponding computer program product. L'invention concerne un système de processeurs (10) comprenant une unité de traitement (12) avec un jeu d'instructions prédéterminé et au moins un registre de prédicat (14), le registre de prédicat (14) comprenant un nombre N d'emplacements de données de prédicat (P1, P2, ..., Pn) agencés en une structure de données de prédicat, chaque emplacement de données de prédicat (P1, P2, ..., Pn) étant conçu pour mémoriser des données de prédicat. Le système comprend en outre au moins un registre d'usage général (16), le registre d'usage général (16) comprenant des emplacements de données de pr