MEMORY DEVICE HAVING INTEGRAL INSTRUCTION BUFFER

A dynamic random access memory integrated circuit (30) includes an interface to a serial interconnect (26), where the interface is configured to receive a plurality of memory access instructions over the serial interconnect (26), and a buffer (32) configured to store the plurality of memory access i...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KUUSILINNA, KIMMO, KALERVO, NIKARA, JARI, ANTERO, AHO, EERO, TAPANI
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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